Commit Graph

61348 Commits

Author SHA1 Message Date
Adam Ford 5d44207d17 configs: omap3_logic_somlv: Remove GPIO from SPL
The SPL is too tight, and it cannot start any longer.  To
help reduce the size of SPL, we need to remove some non-critical
features.

This patch removes SPL_GPIO_SUPPORT to free up some operating space.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Adam Ford 899836c315 ARM: dts: logicpd-som-lv-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.

This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Adam Ford 88279e1b0f Revert "ARM: omap3_logic/omap35_logic: Enable GPIO in SPL"
The SPL is too tight, and it cannot start any longer.  To
help reduce the size of SPL, we need to remove some non-critical
features.

This reverts commit 66063a7c13.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Adam Ford 1e3d015a03 ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.

This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Adam Ford 27b6534491 ARM: omap3_logic: Power on MMC when setting up PMIC
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.

This patch patch explicitly tells the twl4030 to power the MMC.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Keerthy 14dfca69d7 configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs
Enable AVS Class 0 & dependent config options.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo b31e650867 configs: am65x_evm_r5_defconfig: Enable AVS class 0 support
Enable AVS class 0 support for the R5 SPL bootloader.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo e41dd6c499 configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
TPS62363 is used to control the MPU_VDD voltage, so enable the driver
for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 2f71498d52 arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply
Hook buck12_reg to vtm avs supply

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 0f63ceaf54 arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node
Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 69eceae870 arm: dts: k3-j721e-r5-common-proc-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo 56adc6615f arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo c5f73d1c9f arm: dts: k3-am654-r5-base-board: add supply rail for MPU
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo 4bbb3849aa arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
Enable wkup_i2c0 as this is needed for voltage control.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy cfa6bd549c arm: dts: k3-am654-r5-base-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 7b13493088 arm: mach-k3: j721e_init: Initialize avs class 0
Initialize avs class 0

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 27380cb7e9 arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 065a452ae6 power: regulator: tps65941: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for tps65941 family of PMICs.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy 6b86dd0c1e power: pmic: tps65941: Add support for tps65941 family of PMICs
Add support to bind the regulators/child nodes with the pmic.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Keerthy 9a03e50c5f misc: k3_avs: Add j721e support
j721e SoCs have different OPP tables. Add support for the same.

Note: DM Still has lot of voltages TBD hence the correct
values need to be programmed once they are published.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Tero Kristo 22e8f18980 power: regulator: tps6236x: add support for tps6236x regulators
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Keerthy e0aa873bc7 clk: clk-ti-sci: Notify AVS driver upon setting clock rate
Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Tero Kristo 9d233b4e3e misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
liu hao e3aafef4cf arm: add initial support for the Phytium Durian Board
This adds platform code and the device tree for the Phytium Durian Board.
The initial support comprises the UART and the PCIE.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>

Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
2019-11-07 18:01:13 -05:00
Alexander Dahl 672c57057f cmd: mtdparts: Fix build with option ..._SHOW_NET_SIZES
That option is currently not used by any defconfig and could not be set
anymore since it became mandatory to used Kconfig when introducing new
options with U-Boot v2016.11 or commit eed921d923 ("Kconfig: Add a
whitelist of ad-hoc CONFIG options") and commit 371244cb19 ("Makefile:
Give a build error if ad-hoc CONFIG options are added").

It was also not considered when fixing build warnings in
commit 39ac34473f ("cmd_mtdparts: use 64 bits for flash size,
partition size & offset") and could probably not be compiled anyway
after commit dfe64e2c89 ("mtd: resync with Linux-3.7.1"), which
renamed some members of struct mtd_info … so it was probably broken
since then, which was U-Boot v2013.07-rc1.

However it still seems to work, see example output below:

U-Boot 2019.10-00035-g06a9b259ca-dirty (Oct 30 2019 - 14:03:44 +0100)

CPU: SAMA5D27 1G bits DDR2 SDRAM
Crystal frequency:       24 MHz
CPU clock        :      492 MHz
Master clock     :      164 MHz
Model: ***
DRAM:  128 MiB
NAND:  256 MiB
Loading Environment from NAND... OK
In:    serial@f8020000
Out:   serial@f8020000
Err:   serial@f8020000
Net:   eth0: ethernet@f8008000
Hit keys 'tt' to stop autoboot (3 seconds).
U-Boot> mtdparts

device nand0 <atmel_nand>, # parts = 8
 #: name                size            net size        offset          mask_flags
 0: bootstrap           0x00040000      0x00040000      0x00000000      1
 1: uboot               0x000c0000      0x000c0000      0x00040000      1
 2: env1                0x00040000      0x00040000      0x00100000      0
 3: env2                0x00040000      0x00040000      0x00140000      0
 4: fpga_led            0x00040000      0x00040000      0x00180000      1
 5: reserved            0x00040000      0x00040000      0x001c0000      1
 6: rootfs_rec          0x03200000      0x03200000      0x00200000      1
 7: filesystem          0x0cc00000      0x0cb80000 (!)  0x03400000      0

active partition: nand0,0 - (bootstrap) 0x00040000 @ 0x00000000

defaults:
mtdids  : nand0=atmel_nand
mtdparts: mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env1),256k(env2),256k(fpga_led)ro,256k(reserved)ro,50M(rootfs_rec)ro,-(filesystem)

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-11-07 18:01:13 -05:00
Alexander Dahl 20841c52bb cmd: nand: Remove not used declaration
This declaration is not used anywhere in the whole tree. There is a
function 'mtd_id_parse()' which was renamed from 'id_parse()' in
commit 68d7d65100 ("Separate mtdparts command from jffs2"), but that
function is not used (anymore?) in cmd nand and build is fine without
that declaration, so it's probably just safe to remove.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
2019-11-07 18:01:13 -05:00
Lokesh Vutla 7a540eeecc arm: caches: Disable mmu only if mmu is available
As part of disabling caches MMU as well gets disabled. But MMU is not
available on all armv7 cores like R5F. So disable MMU only if it is
available.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07 18:01:13 -05:00
Heinrich Schuchardt 68c0912bf2 hush: re-sequence includes
'make tests' on a 32bit ARM system leads to

In file included from ../common/cli_hush.c:79:
../include/malloc.h:364:7: error: conflicting types for ‘memset’
 void* memset(void*, int, size_t);
       ^~~~~~
In file included from ../include/compiler.h:126,
                 from ../include/env.h:12,
                 from ../common/cli_hush.c:78:
../include/linux/string.h:103:15:
note: previous declaration of ‘memset’ was here
 extern void * memset(void *,int,__kernel_size_t);
               ^~~~~~
In file included from ../common/cli_hush.c:79:
../include/malloc.h:365:7: error: conflicting types for ‘memcpy’
 void* memcpy(void*, const void*, size_t);
       ^~~~~~
In file included from ../include/compiler.h:126,
                 from ../include/env.h:12,
                 from ../common/cli_hush.c:78:
../include/linux/string.h:106:15:
note: previous declaration of ‘memcpy’ was here
 extern void * memcpy(void *,const void *,__kernel_size_t);
        ^~~~~~

According to the U-Boot coding style guide common.h should be the first
include.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt bb71a2d9dc dlmalloc: calloc: fix zeroing early allocations
When full malloc is enabled and SYS_MALLOC_F is also enabled, the simple
pre-reloc heap is used before relocation. In this case, calloc() uses
the MALLOC_ZERO macro to zero out the allocated memory. However, since
this macro is specially crafted for the dlmalloc implementation, it
does not always work for simple malloc.

For example, when allocating 16 bytes via simple malloc, only the first
12 bytes get zeroed out. The last 4 bytes will remain untouched.

This is a problem for DM drivers that are allocated before relocation:
memory allocated via 'platdata_auto_alloc_size' might not be set to
zero, resulting in bogus behaviour.

To fix this, use 'memset' instead of 'MALLOC_ZERO' to zero out memory
that compes from simple malloc.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt d024e992b3 spl: fix SPI config dependencies
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt a43b60cc78 arm: socfpga: gen5: fix ERR_PTR_OFFSET
The default implementation of ERR_PTR/PTR_ERR maps errno values at the
and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA).

For socfpga gen5 SPL, this doesn't really work, as the heap is nearly
at the end of the 32 bit address range.

This patch adjusts the ERR_PTR_OFFSET to map errno values into the range
of the Boot ROM, which should not be used for valid pointers.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt 8c59ca93b8 linux err: make ERR_PTR/PTR_ERR architecture specific
This patch changes ERR_PTR/PTR_ERR to use CONFIG_ERR_PTR_OFFSET to map
errno values into a pointer region that cannot contain valid pointers.

IS_ERR and IS_ERR_OR_NULL have to be converted to use PTR_ERR, too,
for this to work.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt 93db2b83ed Kconfig add config ERR_PTR_OFFSET
Some U-Boot pointers have redundant information, so we can use a scheme
where we can return either an error code or a pointer with the same
return value. The default implementation just casts the pointer to a
number, however, this may fail on platforms where the end of the address
range is used for valid pointers (e.g. 0xffffff00 is a valid heap pointer
in socfpga SPL). For such platforms, this value provides an upper range
of those error pointer values - up to 'MAX_ERRNO' bytes below this value
must be unused/invalid addresses.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-07 18:01:13 -05:00
Vignesh Raghavendra 37e66ba916 arm64: Add memcpy_{from, to}io() and memset_io() helpers
Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07 18:01:12 -05:00
Cristian Ciocaltea 036218a671 api: storage: Add the missing write operation support
API_dev_write(va_list ap) is currently lacking the write support
to storage devices because, historically, those devices did not
implement block_write()

The solution has been tested by loading and booting a (patched)
GRUB instance in a QEMU vexpress-a9 environment. The disk write
operations were triggered with GRUB's save_env command.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
2019-11-07 17:58:31 -05:00
Tom Rini 0be2ecd486 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-07 17:58:06 -05:00
Tom Rini d911087889 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- mpc85xx, socrates: Add dts, enable DM support, fix warnings, disable
  video
2019-11-07 07:25:14 -05:00
Tom Rini 416b5dd5f4 Merge branch '2019-11-06-reenable-llvm-in-ci'
- Re-enable LLVM tests in Travis and add them to GitLab and Azure
2019-11-06 22:54:47 -05:00
Tom Rini 0219d014a7 gitlab/azure: Enable LLVM tests
Now that we have again fixed the problems that building with clang
exposes, enable these tests on Azure and GitLab-CI as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
Tom Rini 626b0389ec travis: Fix the clang-7 test
When using the OVERRIDE variable we need to pass -O to buildman as well
to use the "override" option to buildman.

Fixed: e9500f49ea ("travis: Use buildman for building with clang")
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
Tom Rini 5e63c96aa7 common/console.c: Fix unused warning with console_doenv()
Newer versions of LLVM-7 will provide an unused function warning over
console_doenv() in the case of SYS_CONSOLE_IS_IN_ENV not being enabled
as can be the case in SPL.  Add guards around this function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
T Karthik Reddy f69257baa8 usb: composite: add BOS descriptor support to composite framework
To add usb-3.0 support to peripheral device add BOS & SS capability
descriptors to gadget composite framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra d80effb184 usb: gadget: Add gadget_is_cdns3() macro
Add a new bcdDevice entry for Cadence USB gadget controller similar to
other controller and add gadget_is_cdns3() macro as well.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra a9ca4193bd usb: cdns3: Add TI wrapper driver for CDNS USB3 controller
Add driver to handle TI specific wrapper for Cadence USB3 controller
present on J721e SoC. Based on Linux driver for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra 927c22b0da usb: cdns3: gadget: Implement udc_set_speed() callback
Implement udc_set_speed() callback to limit Controller's speed to
high-speed/full-speed when working with gadgets that are high-speed or
full-speed only

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra 7e91f6ccdc usb: Add Cadence USB3 host and gadget driver
Add support for USB3 host and gadget driver. This is a direct sync of
Linux kernel Cadence USB stack that from v5.4-rc1 release.
Driver has been modified so that it compiles without errors against
U-Boot code base.
Features not required for U-Boot such as scatter-gather DMA and OTG
interrupt handling has been dropped.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
[jjhiblot@ti.com: Add PHY support]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Sherry Sun 8d94e184ff usb: udc: Introduce ->udc_set_speed() method
This patch was copied from kernel commit: 67fdfda4a99ed.

Sometimes, the gadget driver we want to run has max_speed lower than
what the UDC supports. In such situations, UDC might want to make sure
we don't try to connect on speeds not supported by the gadget
driver because that will just fail.

So here introduce a new optional ->udc_set_speed() method which can be
implemented by interested UDC drivers to achieve this purpose.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra 77dcbdf3c1 usb: gadget: Add match_ep() op to usb_gadget_ops
Add match_ep() op to usb_gadget_ops similar to Linux kernel which is
useful in finding a suitable ep match for the function driver. This will
avoid adding more gadget_is_xxx() handling code to usb_ep_autoconfig().

Also sync usb_ep_caps struct thats is usually used in the match_ep()
callback by the gadget controller driver

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra c93e305af7 bitmaps: import for_each_set_bit() macro
Import for_each_set_bit() and associated macros and functions from
Linux. This is useful in parsing interrupt registers and take action on
each bit that is set.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00
Vignesh Raghavendra c37f594280 list: import list_first_entry_or_null()
Import list_first_entry_or_null() macro from Linux that would be used
by Cadence USB driver

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-11-07 00:24:59 +01:00