Commit Graph

49453 Commits

Author SHA1 Message Date
Michal Simek
d13d97bb95 arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0
Follow spec for node names.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
9d928f0418 arm64: zynqmp: Use keycode from input/input.h
Instead of hardcoding numbers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
52af7e3e81 arm64: zynqmp: Remove additional comments from dts files
Remove additional comments which were removed as the part of upstreaming.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Michal Simek
18a952ce7f arm64: zynqmp: Sync up license with mainline kernel
Mainline Linux kernel has adopted SPDX header license in a different
format then was used before. This patch is syncing it up.

Also update years in License text and remove Nathalie's email because it
is no longer valid.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
ba7b6dfae1 arm64: zynqmp: Use i2c-mux instead of i2cswitch instead
Based on review from mainline i2c-mux is standard name for i2c switches.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
a16e578639 arm64: zynqmp: Use maxim prefix for all maxim chips
Use vendor prefix for Maxim chips.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Michal Simek
680e9976c9 arm64: zynqmp: Sync alignment with mainline
Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:47 +02:00
Heinrich Schuchardt
23e7e6b6b9 MAINTAINERS: ZYNQMP: correct entries
Replace references to non-existent file.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Michal Simek
3d14228f1b MAINTAINERS: Fix zynqmp clock driver path
Fix c&p error from Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Michal Simek
7ad6d9a4ad arm: zynq: Handle ENXIO error return value properly
zynq_clk_get_rate() is also returning ENXIO which is not handled now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Anton Gerasimov
1d4fc9ef1f ARM: dts: zynq: Rename dts for Z-turn board
Makes naming in line with other Zynq boards.

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Anton Gerasimov
6fb7b75673 ARM: dts: zynq: Update dts for Z-turn board
Delete devices implemented in PL, stylistic changes.

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 08:02:50 +02:00
Mario Six
5bc0543df3 treewide: Convert CONFIG_HOSTNAME to a string option
CONFIG_HOSTNAME is defined as a "plain" preprocessor string, but every
use is couched by __stringify(...).

Hence, convert it to a proper string option.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:09 -04:00
Mario Six
07dea2e737 treewide: Migrate CONFIG_FSL_ESDHC to Kconfig
Migrate the CONFIG_FSL_ESDHC option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:05 -04:00
Mario Six
171510522e treewide: Migrate CONFIG_TSEC_ENET to Kconfig
Migrate the CONFIG_TSEC_ENET option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 15:12:53 -04:00
Mario Six
78eba69d98 treewide: Migrate CONFIG_DISPLAY_BOARDINFO_LATE to Kconfig
Migrate the CONFIG_DISPLAY_BOARDINFO_LATE option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 15:12:09 -04:00
Mario Six
2aeb22d9ab treewide: Migrate CONFIG_LAST_STAGE_INIT to Kconfig
Migrate the CONFIG_LAST_STAGE_INIT option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 14:52:54 -04:00
Mario Six
02ddc1477c treewide: Migrate CONFIG_BOARD_EARLY_INIT_R to Kconfig
Migrate the CONFIG_BOARD_EARLY_INIT_R option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 14:52:54 -04:00
Mario Six
e89f8aae3d treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig
Migrate the CONFIG_SYS_ALT_MEMTEST option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[trini: Re-run migration after also including CMD_MEMTEST]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 14:52:45 -04:00
Tom Rini
c9542eae0b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 20:37:13 -04:00
Tom Rini
df0370bc41 configs: Finish migration of CONFIG_ATMEL_SPI
With the previous temporary reverts, we need to re-complete the
migration of CONFIG_ATMEL_SPI here now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 13:11:01 -04:00
Tom Rini
e80fa2c2c0 Revert "spi: atmel: Drop non-dm code"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 7b09477873.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:19:00 -04:00
Tom Rini
5270df2836 Revert "spi: atmel: Drop atmel_spi.h"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 37434db29b.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:18:26 -04:00
Mario Six
55b2556115 cmd: Add command for calculating binary operations
This patch adds a command that enables the calculation of bit operations
(AND, OR, XOR) on binary data from the command line. Memory locations as
well as the contents of environment variables are eligible as sources
and destination of the binary data used in the operations.

The possible applications are manifold: Setting specific bits in
registers using the regular read-OR-write pattern, masking out bits in
bit values, implementation of simple OTP encryption using the XOR
operation, etc.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-06 20:45:44 -04:00
Mario Six
8354aa2781 cmd: ximg: Respect cache line size for flushing
Make sure that the cache line size if respected when flushing the cache.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-06 20:45:44 -04:00
Mario Six
b053dd7c5a gpio: uclass: Fix debug string
A debug string still has the old name of a function being called; update
it.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Michal Simek
3b17e19918 watchdog: Fix Kconfig alignment for WDT_SANDBOX
Fix Kconfig alignment which should be <tab><space><space>.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Michal Simek
6faf4622a9 image: fit: Show information about OS type in firwmare case too
SPL ATF implementation requires FIT image with partitions where the one
is Firmware/ATF and another one Firmware/U-Boot. OS field is used for
recording that difference that's why make sense to show values there for
Firmware types.

For example:
 Image 0 (atf)
  Description:  ATF bl31.bin
  Created:      Mon Mar 26 15:58:14 2018
  Type:         Firmware
  Compression:  uncompressed
  Data Size:    51152 Bytes = 49.95 KiB = 0.05 MiB
  Architecture: ARM
  OS:           ARM Trusted Firmware
  Load Address: 0xfffe0000
  Hash algo:    md5
  Hash value:   36a4212bbb698126bf5a248f0f4b5336
 Image 1 (uboot)
  Description:  u-boot.bin
  Created:      Mon Mar 26 15:58:14 2018
  Type:         Firmware
  Compression:  uncompressed
  Data Size:    761216 Bytes = 743.38 KiB = 0.73 MiB
  Architecture: ARM
  OS:           U-Boot
  Load Address: 0x08000000
  Hash algo:    md5
  Hash value:   f22960fe429be72296dc8dc59a47d566

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
2018-04-06 20:45:44 -04:00
Michal Simek
1f8e4bf55e image: fit: Show firmware configuration property if present
SPL ATF support requires to have firmware property which should be also
listed by mkimage -l when images is created.

The patch is also using this macro in spl_fit to match keyword.

When image is created:
 Default Configuration: 'config'
 Configuration 0 (config)
  Description:  ATF with full u-boot
  Kernel:       unavailable
  Firmware:     atf
  FDT:          dtb

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-06 20:45:44 -04:00
Vignesh R
c7aead1100 configs: am43xx_evm_qspiboot_defconfig: Move to DM
Move am43xx_evm_qspiboot_defconfig to DM. This is required as SPI core
and TI QSPI driver no longer supports non DM interfaces.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Vignesh R
7d83803b49 ARM: dts: Add new "generic" am4372 device tree file.
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.

Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for
board detection via DM_I2C.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Vignesh R
5375a9b566 board: ti: am43xx: Define embedded_dtb_select for runtime DTB selection in U-boot
AM437x QSPI boot is a single stage boot and hence needs runtime DTB
selection to support AM437x-SK and AM437x-IDK with DM enabled. This is
required to move am43xx_evm_qspiboot_defconfig to use DM/DT.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Sjoerd Simons
d48b8d1138 env: Properly check for BLK support
Use CONFIG_IS_ENABLED to see if CONFIG_BLK is enabled. Otherwise
SPL compilation breaks on boards which do have CONFIG_BLK enabled but
not DM_MMC for the SPL as follows:

env/mmc.c: In function ‘init_mmc_for_env’:
env/mmc.c:164:6: warning: implicit declaration of function ‘blk_get_from_parent’; did you mean ‘efi_get_ram_base’? [-Wimplicit-function-declaration]
  if (blk_get_from_parent(mmc->dev, &dev))
      ^~~~~~~~~~~~~~~~~~~
      efi_get_ram_base
env/mmc.c:164:29: error: ‘struct mmc’ has no member named ‘dev’
  if (blk_get_from_parent(mmc->dev, &dev))
                             ^~

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
4abd9cecee configs: k2hk_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh vutla <lokeshvutla@ti.com>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
9b7a6fdf42 configs: k2e_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-04-06 20:45:44 -04:00
Andrew F. Davis
24f521d61e configs: k2g_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-04-06 20:45:44 -04:00
Chris Packham
402c8fd514 rtc: rx8025: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rx8025 implementation of
rtc_reset() does not need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
05d63d8bce rtc: rs5c372: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rs5c372 implementation of
rtc_reset() does not need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
fbd8179cba rtc: mx27rtc: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the mx27rtc implementation of
rtc_reset() can be an empty stub function.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
a6bf689a70 rtc: ds1374: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1374 implementation of
rtc_reset() doesn't need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-04-06 20:45:44 -04:00
Chris Packham
c1a2afa408 rtc: ds1307: remove redundant code in rtc_reset
As of commit 1a1fa24066 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1307 implementation of
rtc_reset() doesn't need to call rtc_set().

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-06 20:45:44 -04:00
Christian Gmeiner
476c2fcd28 bootvx: use program header for loading
The section header address is a VMA whereas the address found in
the program header is a physical one. With this change it is
possible to load and start a vx7 intel generic based image.

$ readelf -l /tmp/vx7

Elf file type is EXEC (Executable file)
Entry point 0x408000
There are 2 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x001000 0x00408000 0x00408000 0x04000 0x04000 RWE 0x1000
  LOAD           0x005000 0xe040c000 0x0040c000 0x583a84 0x5ccc70 RWE 0x1000

 Section to Segment mapping:
  Segment Sections...
   00     .text.locore .data.locore
   01     .text .eh_frame .wrs_build_vars .data .tls_data .tls_vars .bss

$ readelf -S /tmp/vx7
There are 13 section headers, starting at offset 0x588af8:

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
  [ 1] .text.locore      PROGBITS        00408000 001000 00011e 00  AX  0   0 16
  [ 2] .data.locore      PROGBITS        00409000 002000 003000 00  WA  0   0 4096
  [ 3] .text             PROGBITS        e040c000 005000 4802a0 00 WAX  0   0 32
  [ 4] .eh_frame         PROGBITS        e088c2a0 4852a0 0a1ed0 00   A  0   0  4
  [ 5] .wrs_build_vars   PROGBITS        e092e170 527170 000190 00  Ax  0   0  1
  [ 6] .data             PROGBITS        e092f000 528000 060a70 00  WA  0   0 4096
  [ 7] .tls_data         PROGBITS        e098fa70 588a70 000004 00   A  0   0  4
  [ 8] .tls_vars         PROGBITS        e098fa78 588a78 00000c 00  WA  0   0  4
  [ 9] .bss              NOBITS          e098faa0 588a84 0491d0 00  WA  0   0 32
  [10] .shstrtab         STRTAB          00000000 588a84 000074 00      0   0  1
  [11] .symtab           SYMTAB          00000000 588d00 056ee0 10     12 9758  4
  [12] .strtab           STRTAB          00000000 5dfbe0 05f48a 00      0   0  1
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

For completeness here are the same information for an old vx5 based image. After
this change it is possible to boot vx5 and vx7 (intel generic) images.

$ readelf -l /tmp/vx5

Elf file type is EXEC (Executable file)
Entry point 0x308000
There are 1 program headers, starting at offset 52

Program Headers:
 Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
 LOAD           0x000060 0x00308000 0x00308000 0x3513a0 0x757860 RWE 0x20

Section to Segment mapping:
 Segment Sections...
  00     .text .data .bss
[christian@chgm-pc ~]$ readelf -S /tmp/vx5
There are 12 section headers, starting at offset 0x356580:

Section Headers:
 [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
 [ 0]                   NULL            00000000 000000 000000 00      0   0  0
 [ 1] .text             PROGBITS        00308000 000060 319b10 00 WAX  0   0 32
 [ 2] .data             PROGBITS        00621b20 319b80 037880 00  WA  0   0 32
 [ 3] .bss              NOBITS          006593a0 351400 4064c0 00  WA  0   0 16
 [ 4] .debug_aranges    PROGBITS        00000000 351400 000060 00      0   0  1
 [ 5] .debug_pubnames   PROGBITS        00000000 351460 00018b 00      0   0  1
 [ 6] .debug_info       PROGBITS        00000000 3515eb 003429 00      0   0  1
 [ 7] .debug_abbrev     PROGBITS        00000000 354a14 000454 00      0   0  1
 [ 8] .debug_line       PROGBITS        00000000 354e68 0016a4 00      0   0  1
 [ 9] .shstrtab         STRTAB          00000000 35650c 000071 00      0   0  1
 [10] .symtab           SYMTAB          00000000 356760 0440e0 10     11 8574  4
 [11] .strtab           STRTAB          00000000 39a840 03e66c 00      0   0  1
Key to Flags:
 W (write), A (alloc), X (execute), M (merge), S (strings)
 I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
 O (extra OS processing required) o (OS specific), p (processor specific)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-06 20:45:44 -04:00
Patrick Delaunay
86634a93b4 stm32mp: handle SYSRESET
Add support of sysreset with generic driver "syscon-reboot"
provided by RCC, for U-boot and for SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:44 -04:00
Patrick Delaunay
e16750ff0e stm32mp: add syscon for STGEN
Add STGEN as SYSCON device: allow access to device address
defined in device tree

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
b90f0e7c37 stm32mp1: change STGEN clock source to HSE
No more use static frequency HSI = 64MHz for STGEN clock
but HSE (with higher accurency) by default.

Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency
is provided at boot by BootRom and cp15 cntfrq and modified
during clock tree initialization if needed.

When HSI is no more used by any device, this internal
oscillator can be switched off to reduce consumption.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
938e0e3f6e clock: stm32mp1: add stgen clock source change support
The STGEN is the clock source for the Cortex A7 arch timer.
So after modification of its frequency, CP15 cntfreq is updated
and a new timer init is performed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
46fc679ede arm: timer: get frequency for arch timer armv7 in cp15 cntfrq
Manage dynamic value for armv7 arch clock timer,
when CONFIG_SYS_HZ_CLOCK is not defined.
Get frequency from CP15 cntfrq information, initialized for example
by first boot stage, clock driver or by BootRom.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Rasmus Villemoes
f3d8f7dd73 Allow providing default environment from file
Modifying the default environment via CONFIG_EXTRA_ENV_SETTINGS is
somewhat inflexible, partly because the cpp language does not allow
appending to an existing macro. This prevents reuse of "environment
fragments" for different boards, which in turn makes maintaining that
environment consistently tedious and error-prone.

This implements a Kconfig option for allowing one to define the entire
default environment in an external file, which can then, for example, be
generated programmatically as part of a Yocto recipe, or simply be kept
in version control separately from the U-boot repository.

Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
11dfd1a331 stm32mp1: select boot device and partition
Bootrom loads SPL from SDCARD or eMMC
according BootPin selection.

Then SPL loads U-Boot on the same mmc device
with the following predefined GPT partitioning:

on SDCARD: gpt partitioning
  1: SPL
  2: SPL#2
  3: U-Boot
  4: bootable partition

on eMMC:
  The 2 boot partitions are used for SPL (2 copy)
    boot1: SPL
    boot2: SPL#2
  The user partition use gpt partitioning
    1: U-Boot
    2: bootable partition

This patch select the correct SPL partition
(3 for SDCARD on mmc0 and 1 for eMMC on mmc1)
according the BootRom information saved in TAMP register
and based on configuration flasg:
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
  => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new)
  => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot

And the correct boot_targets is selected according the environment
variables boot_device and boot_instance, with preboot command,
to search the bootable partition with kernel on this device
(generic distro support).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00
Patrick Delaunay
08772f6e79 stm32mp1: get boot mode from BootRom
SPL copy BootRom boot mode information
in TAMP register 21.

This TAMP register information is used
after relocation to set 2 env variables
- boot_device
- boot_instance

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-06 20:45:28 -04:00