The PPA use PSCI to make secondary cores bootup. So when PPA was
enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method
between PSCI and spin-table.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.
Signed-off-by: York Sun <york.sun@nxp.com>
Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.
Signed-off-by: York Sun <york.sun@nxp.com>
The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM,
micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector,
sdio attached rtl8189ftv wifi and an ir receiver.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Now that we know that the BROM stores a value indicating the boot-source
at the beginning of SRAM, use that instead of trying to recreate the
BROM's boot probing.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
We always define CONFIG_MISC_INIT_R on sunxi and misc_init_r is never
called in the spl, so the linker will optimize it and parse_spl_header(),
of which it is the only caller, away.
On the tests I've done (Orange Pi PC build) the SPL actually becomes
8 bytes smaller with this patch.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Currently we fill ethaddr with a fixed unique address based on the SoCs
serial (from the sid) to make sure that boards which use the integrated
emac / gmac get a fixed mac rather then a random one.
On some boards the wifi does not come with a fixed mac either, so we need
to also set eth1addr.
This commit changes the ethaddr setting code to check for ethernet%d
aliases (as fdt_fixup_ethernet does) and set an ethaddr variable for
all present aliases.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The patch converts one of the "reserved" fields in the sunxi SPL
header to a fel_uEnv_length entry. When booting over USB ("FEL
mode"), this enables the sunxi-fel utility to pass the string
length of uEnv.txt compatible data; at the same time requesting
that this data be imported into the U-Boot environment.
If parse_spl_header() in the sunxi board.c encounters a non-zero
value in this header field, it will therefore call himport_r() to
merge the string (lines) passed via FEL into the default settings.
Environment vars can be changed this way even before U-Boot will
attempt to autoboot - specifically, this also allows overriding
"bootcmd".
With fel_script_addr set and a zero fel_uEnv_length, U-Boot is
safe to assume that data in .scr format (a mkimage-type script)
was passed at fel_script_addr, and will handle it using the
existing mechanism ("bootcmd_fel").
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
It is useful to be able to build SPL for sandbox. It provides additional
build coverage and allows SPL features to be tested in sandbox. However
it does not need worthwhile to always create an SPL build. It nearly
doubles the build time and the feature is (so far) seldom used.
So for now, create a separate build target for sandbox SPL. This allows
experimentation with this new feature without impacting existing workflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
This change is to remove a halt at about 200KiB
while sending a large(1MiB) binary to a micro controller using USART1.
USART1 is connected to a PC via an on-board ST-Link debugger
that also functions as a USB-Serial converter.
However, it seems to loss some data occasionally.
So I changed the serial port to USART6 and connected it to the PC using
an FTDI USB-Serial cable, therefore the transmission was successfully
completed.
Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
This patch adds SDRAM support for stm32f746 discovery board.
This patch depends on previous patch.
This patch is based on STM32F4 and emcraft's[1].
[1]: https://github.com/EmcraftSystems/u-boot
Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
Modify the SPL build procedure for AM437x high-security (HS) device
variants to create a secure u-boot_HS.img FIT blob that contains U-Boot
and DTB artifacts signed (and optionally encrypted) with a TI-specific
process based on the CONFIG_TI_SECURE_DEVICE config option and the
externally-provided image signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS)
device variants to create a secure u-boot_HS.img FIT blob that contains
U-Boot and DTB artifacts signed with a TI-specific process based on the
CONFIG_TI_SECURE_DEVICE config option and the externally-provided image
signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.
Currently supported:
- 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
SOM-DB5800.
- 4x USB 2.0 (EHCI)
- Video
- SATA
- Ethernet
- PCIe
- Realtek ALC892 HD Audio
Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
HDA_SDI0 is set in DT to enable HD Audio codec.
Pin defaults for codec pin complexs are not changed.
Not supported:
- Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
- USB 3.0 (XHCI)
- TPM
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.
This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since we lack information about the DRAM initialization for the
Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
involved at the moment.
Add a README file to explain the process.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Move to board/sunxi/ from doc/]
Signed-off-by: Tom Rini <trini@konsulko.com>
The Parrot Board is an evaluation board with an Allwinner R16 (assumed
to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host
and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2
controllable buttons, an LVDS port with separated backlight and
capacitive touch panel ports, an audio/microphone jack, a camera CSI
port, 2 sets of 22 GPIOs and an accelerometer.
The DTS file is identical to the one submitted to the upstream kernel.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The switch to simple_printf was causing the SPL dram info to show as:
DRAM: u MiB
This fixes this by switching from %lu to %d for printing the DRAM size.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Align the name of the defconfig file for high-security (HS) device variants
from the AM43xx family of SoCs with the corresponding name used for the
general purpose devices. This allows for easier cross-association of those
files and also provides room to grow from an HS device part number
perspective.
Furthermore, update and cleanup associated MAINTAINERS file.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Madan Srinivas <madans@ti.com>
Not only am335x supports booting from NOR, i.MX6 SoCs also
supports booting from NOR. Make NOR_BOOT a common
option to let different SoCs share it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Christophe Ricard <christophe-h.ricard@st.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Francois Retief <fgretief@spaceteq.co.za>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
add DM and DTS support for the at91 based siemens
boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
There is no more define of CONFIG_SYS_HUSH_PARSER. Rename some
remaining references and drop the backward compatible Kconfig entry.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
s/hardkernel/amlogic/ to have a single place for all the amlogic-based
boards.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
The LBMAP switches on the board will tell which boot device is used.
Only QSPI boot is supported if the boot device is IFCCard.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This reverts commit 1a5f0de08e86("sunxi: make SoC variant choice
mandatory").
With the optional marking in the Kconfig "make savedefconfig"
will drop CONFIG_MACH_SUN4I=y from all the A10 boards, making it
hard to see at a glance which family of sunxi chips the defconfig
is for.
This commit therefore restores the optional, and restores
CONFIG_MACH_SUN4I=y to all defconfig's which had it dropped
because of this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The inet86dz board is a board used in 7" tablets from various oems.
These tablets are a23 based 7" tablets featuring a 1024x600 LCD,
512MB RAM, 4G NAND, rtl8188etv usb wifi, gsl1680 touchschreen,
micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector
which doubles as charging port.
The dts file this commit adds is identical to the one submitted to
the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The Polaroid MID2407PXE03 is an a23 based 7" tablet based on a M86_MB V2.0
PCB, featuring a 800x480 LCD, 512MB RAM, 4G NAND, esp8089 wifi, gsl1680
touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg
connector which doubles as charging port.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a README file for helping users to install U-Boot into the eMMC.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
The latest version of warp7 board provides the connection of the
WDOG1_B pin to the PMIC.
Program the watchdog to enable the WDOG1_B output which causes
a POR reset.
Based on the imx7dsabresd code.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
The current pad DSE for QSPI is 60ohm. This setting cause
too strong drive to clock and data signals. Need to change
the DSE to 120ohm for better signal quality.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
If LCD_nPWREN is high, output is 2.4V which is not correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Fix 74LV OE gpio index. gpio index is wrong,
so gpio output will not have effect, since we
use wrong GPIO5_IO18, but not correct GPIO5_IO8.
And at the end of the initialization of 74lv init, should
keep OE voltage level at LOW to make 74lv output the correct
voltage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
