Add reserve memory for OP-TEE in U-Boot and in kernel device tree:
- no more reduce the DDR size in "memory" node:
CONFIG_SYS_MEM_TOP_HIDE is no more used
- U-Boot device-tree defines the needed "reserved-memory" for OP-TEE
and U-Boot should not use this reserved memory: board_get_usable_ram_top
use lmb lib to found the first free region, the not reserved
memory, enough to relocate U-Boot: the needed size of U-Boot
is estimated with gd->mon_len + CONFIG_SYS_MALLOC_LEN.
- the optee node ("optee@...": firmware with compatible "linaro,optee-tz")
and the associated "reserved-memory" are deactivated in kernel device
tree when OP-TEE is not detected by U-Boot to prevent kernel issue
(memory is reserved but not used, optee driver probe failed).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch reduces the stm32mp1 environment size and builds
dynamically the MTD partitions with information from defconfig
(CONFIG_MTDPARTS_...).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch reduces the stm32mp1 environment size and
builds dynamically the DFU board configuration with gpt
and mtd partitions and information from defconfig
(CONFIG_DFU_ALT_RAM0).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The AV96 board does exist in multiple variants. To cater for all of
them, implement board code handling. There are two GPIOs which code
the type of the board, read them out and use the value to pick the
correct device tree from an fitImage.
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: Iddb330b9a66500495885457cbe17edc0eacaaf43
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Reference from below Linux commit,
commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk")
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This pull request comprises:
* bug fixes
* documentation fixes
* a new function to determine u16 string sizes and its unit test
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Merge tag 'efi-2020-07-rc2-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc2-4
This pull request comprises:
* bug fixes
* documentation fixes
* a new function to determine u16 string sizes and its unit test
After this change both device display and serial console would contain
U-Boto output automatically without any future configuration. This would
allow easier debugging on real device as access to serial console is hard
and also in qemu emulator where it is easier to copy+paste from serial
console as from SDL framebuffer.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Now when code for defining partitions is duplicated at two locations
(option CONFIG_MTDPARTS_DEFAULT in nokia_rx51_defconfig file and macro
OMAP_TAG_PARTITION_CONFIG in rx51.c file) there is no need to have common
macros. Lets inline PART* macros to rx51.c file.
Signed-off-by: Pali Rohár <pali@kernel.org>
In commit commit 43ede0bca7 ("Kconfig: Migrate MTDIDS_DEFAULT /
MTDPARTS_DEFAULT") were removed definitions for onenand partitions.
Revert them back and enable needed options for onenand support.
Signed-off-by: Pali Rohár <pali@kernel.org>
In commit commit 37304aaf60 ("Convert CONFIG_USE_PREBOOT and
CONFIG_PREBOOT to Kconfig") was moved complicated multiline script code
from C header to oneliner in defconfig. After this change multiline to wide
oneliner it is hard to read this code and even harder to debug. Moreover
this script code should be at place where are other scripts, so move it
back to C header file.
Define new env variable preboot which stores this script and in option
CONFIG_PREBOOT calls this preboot variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
In commit commit 278b90ce78 ("configs: Migrate CONFIG_SYS_TEXT_BASE") was
moved definition for CONFIG_SYS_TEXT_BASE option but author probably forgot
to move also comment for lines which are moving. So do it now!
Signed-off-by: Pali Rohár <pali@kernel.org>
Add readl poll API with sleep and timeout support.
This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Some drivers and other bsp code not only poll the
register with timeout but also required to delay
on each transaction.
This patch add that requirement by adding sleep_us
variable so-that read_poll_timeout now support
delay as well.
This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add read_poll_timeout common API similar to Linux iopoll.
readx_poll_timeout will trigger read_poll_timeout with
proper op. This will help to extend the functionalities
like sleep_us to poll timeout in future.
This change is referenced from Linux from below commit:
commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll:
introduce read_poll_timeout macro")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
clk function names in comments should be prefix with
clk instead of clock.
Fix it.
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clients that are requesting some of uclass API's
without a device (with ofnode) usually have _nodev
naming convention.
- clk_get_by_index_nodev
- clk_get_by_name_nodev
- reset_get_by_index_nodev
- gpio_request_by_name_nodev
So, update the same naming convention PHY framework.
This doesn't change the existing functionality.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
node is most of device related API's are termed as device
node and without device related API's are termed as ofnode.
generic_phy_get_by_node API is without device API, so fixed
the node description as ofnode.
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
lpc32xx_ssp driver is deprecated, no active updates
and no board user, hence dropped the same.
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
When doing partition reboot, the boot image won't be reloaded by ROM,
it is just CPU reset to boot entry. The SW has to keep the boot image
inside the RAM unchanged. It includes both the TEXT section and DATA
section.
For SPL, the problem is DATA section will be updated at runtime, so in
next partition reboot the data is not same as the initial value from
cold boot. If any code depends on the initial value, then it will have
problem.
This patch introduces a mechanism to recover the data section
for partition reboot. It adds a new section in image for saving
data section. When from cold boot, the data section will be saved
to that new section at SPL early phase. When from partition reboot,
the data section will be restored from the new section.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add more BCH setting mode and remove the unnecessary platform constrain
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Beacon EmbeddedWorks, formerly known as Logic PD, is releasing
a devkit based on the i.MX8M Mini SoC consisting of baseboard +
SOM.
It supports eMMC on the SOM, microSD on the baseboard, various
GPIO, the PINCTRL, and UART.
Signed-off-by: Adam Ford <aford173@gmail.com>
Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.
NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The code change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes) and proposed a new
way to set ECC layout.
Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.
The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is
1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.
2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.
Previous code has two methods for ECC layout setting, the
legacy_calc_ecc_layout and calc_ecc_layout_by_info, the difference
between these two methods is, legacy_calc_ecc_layout set the chunk size
larger chan oob size and then set the maximum ECC strength that oob can
afford. While the calc_ecc_layout_by_info set chunk size and ECC
strength according to NAND spec. It has been proved that the first
method cannot provide safe ECC strength for some modern NAND chips, so
in current code,
1. Driver read NAND parameters first and then chose the proper ECC
layout setting method.
2. If the oob is large or NAND required data chunk larger than oob size,
chose calc_ecc_for_large_oob, otherwise use calc_ecc_layout_by_info
3. legacy_calc_ecc_layout only used for some NAND chips does not contains
necessary information. So this is only a backup plan, it is NOT
recommended to use these NAND chips.
Signed-off-by: Han Xu <b45815@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.
To resolve this problem, introduce an eth phy generic driver and uclass.
After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.
When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier
board. Currently working is ethernet, serial, eMMC. DT is imported
from Linux 5.4.28 ("462afcd6e7ea") .
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The env variable overlay_files is used while adding the environment
support commands for FIT loading, but it was cleaned up just prior in
commit ee53b59511 ("configs: Remove unneeded overlay_files environment
variable"). Fix this by replacing the undefined variable with the
proper name_overlays env variable.
Fixes: 76470b6929 ("configs: ti: Add environment support commands for FIT loading")
Signed-off-by: Suman Anna <s-anna@ti.com>
The current code uses 'u16_strlen(x) + 1) * sizeof(u16)' in various
places to calculate the number of bytes occupied by a u16 string.
Let's introduce a wrapper around this. This wrapper is used on following
patches
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the UEFI unit test helper functions to the generated HTML
documentation.
Correct some documentation texts in include/efi_selftest.h.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Strict naming conventions have to be followed for Python function
generate_ut_subtest() to collect C unit tests to be executed via
command 'ut'.
Describe the requirements both on the C as well on the Python side.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move below defines which are used by mtest utility to Kconfig.
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fix kmcoge5ne board, re-run migration as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
The commit e89f8aae3d ("treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig")
setup correct dependency on MEMTEST that's why there is no reason to enable
enable alternate memtest without mtest command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no real need to exactly define space for saving patterns for
alternate memory test. It is much easier to allocate space on the stack and
use it instead of trying to find out space where pattern should be saved.
For example if you want to test the whole DDR memory you can't save patter
to DDR and you need to find it out. On Xilinx devices DDR or OCM addresses
were chosen but that means that OCM needs to be mapped and U-Boot has
access permission there.
It is easier to remove this limitation and simply save it on stack because
it is very clear that memory test can't rewrite U-Boot and U-Boot has also
full access to memory where runs from.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Move CONFIG_SYS_MTDPARTS_RUNTIME into Kconfig done by moveconfig.py.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.
By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.
Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Currently displaying status line is done in a weak function
menu_display_statusline().
bootmenu.c overrides the weak default function.
It calls menu_default_choice() and interprets the data as
struct bootmenu_entry.
pxe boot also uses common menu code for pxe menus.
If there is a system that enables both bootmenu and pxe,
menu_display_statusline() defined in bootmenu.c will be called
and it will interpret struct pxe_label as struct bootmenu_entry.
This leads to data aborts and pxe menu corruptions.
This patch adds support for client defined statusline function
to resolve the above bug.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
CONFIG_SEMIHOSTING is selected for the VFP target by the means of
Kconfig already, there is no need to check this in the header file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Juno board features a standard compliant EHCI/OHCI USB host
controller pair, which we can just enable.
The platform data is taken from the device tree.
This allows to use USB mass storage (the only storage on a Juno r0)
for loading.
At least on my board USB seems a bit flaky, I need two "usb reset"
sequences after the "usb start" to detect an USB hard drive.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The UART base clock rate was typo-ed in the header file, probably because
the reference (the Linux .dts) was also wrong[1].
Fix the number to make the baud rate more correct.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=39a1a8941b2
Reviewed-by: Simon Glass <sjg@chromium.org>
The U-Boot documentation explains that variables ending with "_r" hold
addresses in DRAM, while those without that ending point to flash/ROM.
The default variables for the Juno board pointing to the kernel and DTB
load addresses were not complying with this scheme: they lack the
extension, but point to DRAM. This is particularly confusing since the
Juno board features parallel NOR flash, so there *is* a memory mapped
NOR address holding a DTB, for instance.
Fix the variables to use the proper names, changing initrd_addr to
ramdisk_addr_r on the way, which seems to be more prevelant and
documented. On the way adjust the FDT load address to be situated
*before* the kernel, since users happened to overwrite the DTB by the
kernel clearing its .BSS section during initialisation.
Also remove the fdt_high and initrd_high variables (which were set
to -1), to allow U-Boot moving those images around.
This should avoid many problems in the future, but breaks loading
Linux kernels < v4.2, since they expect the DTB to be loaded in the same
512MB region as the kernel. If you need to load such an old kernel,
please set fdt_high to either 0xffffffffffffffff or 0xa0000000 (if you
load the kernel to the beginning of DRAM).
That fixes loading debug kernels, which happened to overwrite the DTB on
certain setups.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
