When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.
Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.
=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
No HAB Events Found!
Add command documentation in mx6_mx7_secure_boot.txt guide.
As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.
The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".
Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.
The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.
Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add ability for hab_status command to show All HAB events and not just
HAB failure events
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently it's not possible to authenticate additional boot images in HAB
open configuration.
The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has been correctly signed prior to closing
their device.
Enable hab.c to authenticate additional boot images in open mode so HAB
events can be retrieved through get_hab_status() function.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Modify to use hab_rvt_failsafe function for failsafe ROM API, not
directly call its ROM address. This function will wrap the sip call for iMX8M
platforms.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).
Authenticate image from DDR location 0x80800000...
Check CSF for Write Data command before authenticating image
data abort
pc : [<fff5494c>] lr : [<fff54910>]
reloc pc : [<8780294c>] lr : [<87802910>]
sp : fdf45dc8 ip : 00000214 fp : 00000000
r10: fffb6170 r9 : fdf4fec0 r8 : 00722020
r7 : 80f20000 r6 : 80800000 r5 : 80800000 r4 : 00720000
r3 : 17a5aca3 r2 : 00000000 r1 : 80f2201f r0 : 00000019
Flags: NzcV IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
To avoid such errors during authentication process, validate IVT structure
by calling validate_ivt function which checks the following values in an IVT:
IVT_HEADER = 0x4X2000D1
ENTRY != 0x0
RES1 = 0x0
DCD = 0x0 /* Recommended */
SELF != 0x0 /* Absoulute address of IVT */
CSF != 0x0
RES2 = 0x0
This commit also checks if Image's start address is 4 byte aligned.
commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image"
removed as this patch addresses the issue.
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7
2. Need to bypass an workaround for i.MX6 to fix problem in MMU.
3. The x18 register needed save & restore before calling any HAB API. According
to ARM procedure call spec, the x18 is caller saved when it is used as
temporary register. So calling HAB API may scratch this register, and
cause crash once accessing the gd pointer.
On ARMv7, the r9 is callee saved when it is used as variable register. So
no need to save & restore it.
4. Add SEC_CONFIG fuse for iMX8M
When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.
Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Prior instantiating RNG we have to ensure if the CAAM job rings are
available. Avoid hardcoded job ring max size and use the definition at
fsl_sec.h
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Prior calling sec_in32() we have to ensure CAAM clock is enabled, the
function sec_in32() is reading CAAM registers and if CAAM clock is disabled
the system will hang.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The CAAM output ring size register offset is currently defined in fsl_sec.h
as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in
i.MX common code.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.
More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html
i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.
The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.
The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.
Command usage:
Print the public key for the device.
- mfgprot pubk
Generates Signature over given data.
- mfgprot sign <data_address> <data_size>
Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.
As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444A
The reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/Solo
Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Trusted Firmware now adds the /reserved-memory subnode to the DT at
runtime[1], putting in the right values.
Drop our hard-coded version, as this might clash with the actual values
(which have also changed), and rely on TF-A to add the node.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7770
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Loading Trusted-Firmware's BL31 at 16KB into DRAM was originally a hack
to allow sharing more code with the other SoCs (which use this offset
in SRAM). However there is no longer a reason for that, as the
problematic macros have been properly separated there.
The latest (and hopefully final) TF-A code drop now changes the load
address to the beginning of DRAM, which is also more easily protected
by the Trustzone memory controller (code to be done).
Adjust the load address of BL31 now, to avoid any issues with
incompatible versions later on (the TF-A patches are about to be merged).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
The T2080RDB has a ds1339 on i2c0. Add this to the devicetree and enable
the relevant support in the configs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Check CONFIG_SOCFPGA_SECURE_VAB_AUTH before perform 'is OS booted from FIT'
checking in board_prep_linux function. And, fix typo of
CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE.
CONFIG_FIT will be enabled in both ATF and VAB boot flow, thus,
board_prep_linux function will always be called by both ATF and
VAB boot flow.
board_pre_linux function will do 'is OS booted from FIT' checking,
and it will be called before board_fit_image_post_process function.
VAB boot flow expects the OS is always booted from FIT and with VAB
signed cerfiticate because the VAB authentication is implemented in
board_fit_image_post_process function. So, VAB needs the 'is OS booted
from FIT' checking in board_pre_linux function.
However, for ATF boot flow, it is not a requirement that the OS must
always booted from FIT. The OS can be booted from individual Image and
kernel dtb file. Thus, we should not do 'if OS is booted from FIT'
checking in board_prep_linux function.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
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Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :
arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
223 | gd->arch.tlb_size = PGTABLE_SIZE;
| ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
224 | gd->arch.tlb_addr = (unsigned long)&early_tlb;
| ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.
Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable the clocks during bsec probe when they are present in device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The command "stm32prog serial <dev>" can directly use the device sequence
number of serial uclass as this sequence number is egual to alias when it
exist; this assumption simplify the code and avoid access to gd->fdt_blob
and the device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When serial instance is not found in device tree, the console
should be enabled and the error should be indicated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to
independently select the support of UART or USB communication for
STM32CubeProgrammer.
For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL
to use U-Boot console of binary loaded by UART (for board bring-up for
example).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Move CONFIG_CMD_STM32PROG in a specific Kconfig file for stm32prog command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Define in the RCC clock provider node which root clocks the driver
depends on. These are root oscillators, which may be present or
not, upon FDT content.
This update binding is introduced in Linux kernel device tree by patch
"ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15"
This patch is a preliminary step for SCMI support of stm32mp15
boards with trusted boot chain, based on TF-A or OP-TEE.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
At present most of the Intel-specific code is built on all devices, even
those which don't have software support for the features provided there.
This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does
not have the required features.
Add a new INTEL_SOC option to control this access. This must be selected
by SoCs that can support the required features.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This option is better placed in the x86 code since it is not generic
enough to be in the core code. Move it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Building qemu-x86_64_defconfig with GCC 11.0 fails with:
arch/x86/cpu/intel_common/lpc.c:
In function ‘lpc_common_early_init’:
arch/x86/cpu/intel_common/lpc.c:56:40:
error: expression does not compute the number of elements in this array;
element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’}
[-Werror=sizeof-array-div]
56 | sizeof(values) / sizeof(u32));
| ^
arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the
second ‘sizeof’ to silence this warning
arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here
50 | } values[4], *ptr;
| ^~~~~~
Add parentheses to silence warning.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Support 'vab' command to perform vendor authentication.
Command format: vab addr len
Authorize 'len' bytes starting at 'addr' via vendor public key
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Vendor Authorized Boot is a security feature for authenticating
the images such as U-Boot, ARM trusted Firmware, Linux kernel,
device tree blob and etc loaded from FIT. After those images are
loaded from FIT, the VAB certificate and signature block appended
at the end of each image are sent to Secure Device Manager (SDM)
for authentication. U-Boot will validate the SHA384 of the image
against the SHA384 hash stored in the VAB certificate before
sending the image to SDM for authentication.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
board/emulation is the place for other QEMU targets like x86, arm,
riscv. Let's move the qemu-ppce500 board codes there.
List me as a co-maintainer for this board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Without this, the DM GPIO driver for MPC8xxx does not compile for
MPC85xx SoCs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined,
they use addrmap_ translation APIs to do the address translation.
However these APIs only work in post-relocation phase.
Update the code logic to fall back to use the default one when in
pre-relocation phase.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LAW related codes should be wrapped with CONFIG_FSL_LAW.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
