Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
integrated in a little aluminium case.
Patch by Martin Krause, 8 Jun 2006
Some code cleanup
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
On PPC44x platforms, the startup message generated in "cpu.c" only
comprised the ppc type and revision but not additional informations
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.
Patch by Stefan Roese, 27 Nov 2005
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
Second serial port on 440GX now defined as a system device.
Add 'Short Etch' code for Cicada PHY within 440gx_enet.c
Patch by Travis B. Sawyer, 12 Jul 2005
Check return value of malloc in 440gx_enet.c
Patch by Travis B. Sawyer, 18 Jul 2005
Initialize allocated dev and private hw structures
after their respective allocation in 440gx_enet.c
* Patch by Steven Scholz, 10 Jun 2005:
Fix byteorder problems with second argument of "bootm" with
standalone images;
- update the pxa-regs.h file for PXA27x chips
- add PXA27x based ADSVIX board
- add support for MMC on PXA27x processors
* Patch by Andrew E. Mileski, 28 Nov 2004:
Fix PPC4xx SPD SDRAM detection bug
* Patch by Hiroshi Ito, 26 Nov 2004:
Fix logic of "test -z" and "test -n" commands
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
additional ethernet addresses.
* Cleanup drivers/i82365.c - avoid duplication of code
* Fix bogus "cannot span across banks" flash error message
* Add support for CompactFlash for the CPC45 Board.
- Added I2C support for ML300.
- Added support for ML300 to read out its environment information
stored on the EEPROM.
- Added support to use board specific parameters as part of
U-Boot's environment information.
- Updated MLD files to support configuration for new features
above.
* Patches by Travis Sawyer, 5 Aug 2004:
- Remove incorrect bridge settings for eth group 6
- Add call to setup bridge in ppc_440x_eth_initialize
- Fix ppc_440x_eth_init to reset the phy only if its the
first time through, otherwise, just check the phy for the
autonegotiated speed/duplex. This allows the use of netconsole
- only print the speed/duplex the first time the phy is reset.
(JFFS2 speed enhancements) because of using non-public
data (PHYS_FLASH_SECT_SIZE)
* Patch by Travis Sawyer, 23 Apr 2004:
Fix VSC/CIS 8201 phy descrambler interoperability timing due to
errata from Vitesse Semiconductor.
- Fix Gigabit Ethernet support for 440GX
- Add Gigabit Ethernet Support to MII PHY utilities
* Patch by Brad Kemp, 12 Mar 2004:
Fixes for drivers/cfi_flash.c:
- Better support for x8/x16 implementations
- Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE
- Added defines for AMD command and address constants
* Patch by Leon Kukovec, 12 Mar 2004:
Fix get_dentfromdir() to correctly handle deleted dentries
* Patch by George G. Davis, 11 Mar 2004:
Remove hard coded network settings in TI OMAP1610 H2
default board config
* Patch by George G. Davis, 11 Mar 2004:
add support for ADS GraphicsClient+ board.
- Add support for the SSV ADNP/ESC1 (Nios Softcore)
* Patch by George G. Davis, 9 Mar 2004:
fix recent build failure for SA1100 target
* Patch by Travis Sawyer, 09 Mar 2004:
Support native interrupt mode for the IBM440GX.
Previously it was running in 440GP compatibility mode.
Ocotea:
- Add IBM PPC440GX Ref Platform support (Ocotea)
Original code by Paul Reynolds <PaulReynolds@lhsolutions.com>
Adapted to U-Boot and 440GX port
440gx_enet.c:
- Add gracious handling of all Ethernet Pin Selections for 440GX
- Add RGMII selection for Cicada CIS8201 Gigabit PHY
ppc440.h:
- Add needed bit definitions
- Fix formatting
* Patch by Carl Riechers, 1 Mar 2004:
Add PPC440GX prbdv0 divider to fix memory clock calculation.
* Patch by Stephan Linz, 27 Feb 2004
- avoid problems for targets without NFS download support
Add support for the Xilinx ML300 platform
* Patch by Stephan Linz, 17 Feb 2004:
Fix watchdog support for NIOS
* Patch by Josh Fryman, 16 Feb 2004:
Fix byte-swapping for cfi_flash.c for different bus widths
* Patch by Jon Diekema, 14 Jeb 2004:
Remove duplicate "FPGA Support" notes from the README file
- update board/emk tree; use common flash driver
- Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
[adapted for other PPC CPUs -- wd]
- Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c
* Patch by Jon Diekema, 13 Feb 2004:
Call show_boot_progress() whenever POST "FAILED" is printed.
* Patch by Nishant Kamat, 13 Feb 2004:
Add support for TI OMAP1610 H2 Board
Fixes for cpu/arm926ejs/interrupt.c
(based on Richard Woodruff's patch for arm925, 16 Oct 03)
Fix for a timer bug in OMAP1610 Innovator
Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2
* Patches by Stephan Linz, 12 Feb 2004:
- add support for NIOS timer with variable period preload counter value
- prepare POST framework support for NIOS targets
* Patch by Denis Peter, 11 Feb 2004:
add POST support for the MIP405 board
