Commit Graph

46970 Commits

Author SHA1 Message Date
Philipp Tomsich
aa122f6b3d spl: rename config item SPL_ATF_SUPPORT to SPL_ATF
Having CONFIG_SPL_ATF seems more natural.
Rename it, while it it is easy and there's few boards that use it
(only RK3399 and RK3368 boards).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
1d3790905d spl: atf: introduce spl_invoke_atf and make bl31_entry private
This adds a new interface spl_invoke_atf() that takes a spl_image_info
argument and then derives the necessary parameters for the ATF entry.
Based on the additional information recorded (into /fit-images) from
the FIT loadables, we can now easily locate the next boot stage.

We now pass a pointer to a FDT as the platform-specific parameter
pointer to ATF (so we don't run into the future headache of every
board/platform defining their own proprietary tag-structure), as
FDT access is already available in ATF.

With the necessary infrastructure in place, we can now update the
support for the ARM Trusted Firmware to dispatch into the
spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
loaded.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
a616c783f2 spl: fit: implement recording of loadables into /fit-images
If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
address and record information for all loadables into this FDT.  This
allows us to easily keep track of images for multiple privilege levels
(e.g. with ATF) or of firmware images preloaded into temporary
locations (e.g. PMU firmware that may overlap the SPL stage).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
9f45aeb937 spl: fit: implement fdt_record_loadable
During the loading of more complex FIT images (e.g. when the invoked
next stage needs to find additional firmware for a power-management
core... or if there are multiple images for different privilege levels
started in parallel), it is helpful to create a record of what images
are loaded where: if a FDT is loaded for one of the next stages, it
can be used to convey the status and location of loadables.

This adds a fdt_record_loadable() function that can be invoked to
record the status of each loadable below the /fit-images path.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
d879616e9e spl: fit: simplify logic for FDT loading for non-OS boots
To better support bootin through an ATF or OPTEE, we need to
streamline some of the logic for when the FDT is appended to an image:
depending on the image type, we'd like to append the FDT not at all
(the case for the OS boot), to the 'firmware' image (if it is a
U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
OPTEE, or some other image-type and U-Boot is listed in the
loadabled).

To achieve this goal, we drop the os_boot flag and track the type of
image loaded.  If it is of type IH_OS_U_BOOT, we append the FDT.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
f2efe6786e spl: change load_addr and entry_point to uintptr_t
Mainly a stylistic change: convert the load_addr and entry_point
fields of struct spl_image_info to uintptr_t (from ulong).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Philipp Tomsich
75014470ae spl: add a fdt_addr field to spl_image_info
When loading a full U-Boot with detached device-tree using the SPL FIT
backend, we should store the address of the FDT loaded as part of the
SPL image info: this allows us to fixup the FDT with additional info
we may want to propagate onward.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:06 +01:00
Philipp Tomsich
4914af1286 image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted Firmware
To boot on ARMv8 systems with ARM Trusted Firmware, we need to
assemble an ATF-specific parameter structure and also provide the
address of the images started by ATF (e.g. BL3-3, which may be the
full U-Boot).

To allow us to identify an ARM Trusted Firmware contained in a FIT
image, this adds the necessary definitions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:06 +01:00
Tom Rini
93a51d301a Merge git://git.denx.de/u-boot-arc 2017-11-24 11:45:15 -05:00
Alexey Brodkin
f2a226780f arc: cache: Add required NOPs after invalidation of instruction cache
As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:23 +03:00
Alexey Brodkin
d764a20f2b arc: bootm: Move slave cores kick-starting under !fake
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:07 +03:00
Eugeniy Paltsev
3194c3cddf ARC: HSDK: introduce CREG GPIO driver
The HSDK can manage some pins via CREG registers block.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-11-24 19:37:56 +03:00
Tom Rini
bb7ab1ccfe Merge git://git.denx.de/u-boot-dm 2017-11-23 22:48:35 -05:00
Simon Glass
9677faa34e binman: Return non-zero exit code on test failure
Return exit code 1 when test fail so that callers can detect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
ca4f4ff7cf binman: Add add test for using an Intel MRC binary
MRC (Memory Reference Code) is a binary blob used to set up the SDRAM
controller on some Intel boards. Add a test for this feature.

With this test coverage on binman is back up to 100%.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
6b187df787 binman: Add add test for SPL with a microcode pointer
Add a test for this feature. It allows SPL to hold a pointer to the
microcode block. This is used for 64-bit U-Boot on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
8772213ea6 binman: Add a test for x86-start16-spl
This allows us to put the 16-bit x86 start-up code in SPL. Add a test for
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
5650984300 binman: Add test for u-boot-spl-bss-pad
Add a test that we can pad the BSS with zero bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
a25ebed36f binman: Check for files missing from test coverage
Files that are never imported are not shown in the test-coverage report.
Detect these and show an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
a9871c6e7e binman: Increase test coverage back to 100%
Make a minor tweak to fix test coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
9fc60b4975 binman: Add a main program to the tests
Add a main program so that the tests can be executed directly, without
going through the main binman program.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
934cdcfb1b binman: Add tests for importlib availability
Add a test that the 'entry' module works with or without importlib.
The tests are numbered so that they are executed in the correct order.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
4d5994f91c binman: Set up 'entry' to permit full test coverage
There is a little check at the top of entry.py which decides if importlib
is available. At present this has no test coverage. To add this we will
need to import the module twice, once with importlib and once without.
In preparation for allowing a test to control the importing of this
module, remove all global imports of the 'entry' module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
5a3f222604 binman: Append to PYTHONPATH when running test coverage
Rather that overwrite this, append to it, in case the caller has already
set up the path correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
aab660fe18 dtoc: Fix up tests
The tool has changed slightly since it was originally written. Update the
tests to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
251f5867c9 buildman: Fix up tests
The tests were broken by two separate commits which adjusted the output
when boards are listed. Fix this by adding back a PowerPC board and
putting the name of each board in the test.

Fixes: b9f7d881 (powerpc, 5xx: remove some "5xx" remains)
Fixes: 8d7523c5 (buildman: Allow showing the list of boards with -n)

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
cb39a10979 buildman: Allow skipping of tests which use the network
Accessing the network slows down the test and limits the environment in
which it can be run. Add an option to disable network tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
6c328f2975 patman: Fix up tests to pass with newest checkpatch
The checkpatch tool was updated but the patman tests were not. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
2f52018c3c test/run: Report and return failure
This script runs the tests but does not report failure. Also it always
returns an exit code of 0 even on failure.

Fix these problems by checking the result of each test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
d09682ef8c binman: Disable the no-unit_address_vs_reg warnings
These warnings are not useful for binman tests. Disable them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
680e3312c2 binman: Rename tests to ftest
At present these tests use the same filename as patman. This adds
confusion when running all tests, since error messages look very similar.
In fact binman tries to run the wrong tests at present.

Rename the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
00ebd1f74d binman: Add a Makefile for test-program compilation
These test programs are includedd as binary files in U-Boot to avoid
having to build them (and associated toolchain differences). Instructions
on building are in the files themselves, but it seems better to provide
a Makefile which can be manually run when desired.

Add a Makefile, separate from the normal build system, to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
9c0a8b1f44 binman: Add docs explaining how to enable binman for a board
The process is not obvious. Add a little section to explain how to move a
board to use binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Simon Glass
511fd0b2bb binman: Add better Makefile debugging
There is a debugging option in the Makefile to allow people to figure out
which u-boot.dtsi files are used in the build. But is it not easy to use
since it only shows files it finds, not those it is looking for. Update it
and update the mention of it to the docs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-22 18:05:38 -07:00
Tom Rini
d9d76023ea Merge git://git.denx.de/u-boot-rockchip 2017-11-22 07:28:58 -05:00
Philipp Tomsich
08790230fe rockchip: remove duplicate CONFIG_ENV_SIZE definitions
A few header files still have a definition of CONFIG_ENV_SIZE, causing
warnings during buildman runs.  This removes the duplicate definitions
from evb_px5.h, geekbox.h and rv1108_common.h.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:24 +01:00
Andy Yan
ecb103bf68 rockchip: check download key before bootup
Enter download mode if the download key pressed.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Converted printfs in boot_mode.c to debug/pr_err:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:24 +01:00
Andy Yan
b4d23f7643 rockchip: add support for enter to bootrom download mode
Rockchip bootrom will enter download mode if it returns from
spl/tpl with a non-zero value and couldn't find a valid image
in the backup partition.
This patch provide a method to instruct the system to back to
bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
As the bootrom download function relys on some modules such as
interrupts, so we need to back to bootrom as early as possbile
before the tpl/spl code override the interrupt configurations.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Andy Yan
e3067793c3 rockchip: make boot_mode related codes reused across all platforms
setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it's better to make this function reused across all the
platforms, and let the mode register address setting from
the config file.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Heinrich Schuchardt
11f12c17d7 rockchip: spi: the symbol for Hertz is Hz
fix typo

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Kever Yang
f24e36dac3 rockchip: clock: update sysreset driver binding
Using priv for new sysreset driver binding.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
f9ee57261f rockchip: sysreset: update Makefile to work with merged sysreset driver
After applying the merged sysreset driver, there are build failures
due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile
to address these build failures.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Kever Yang
6ba54058ed rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
95d363cc30 rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)
With all targets converted to generate prepadded images, this removes
the spl_boot0 field from our config structure and removes the unused
code-path (for images that are not prepadded): i.e. spl_boot0 is now
implied as 'true' and the code is specialised by removing the other
case.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
4bbb05bcb5 rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig
There still are a few CONFIG_SPL_* options selected using defines from
rk3188_common.h instead of via Kconfig.  This migrates those over to
Kconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:23 +01:00
Philipp Tomsich
b82bd1f8d4 rockchip: back-to-bootrom: allow passing a cmd to the bootrom
The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it.  There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.

All the existing call-sites are adjusted to match the changed function
signature.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
4d9253fb76 rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
For the RK3188, the BROM will attempt to load up the first stage
image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
in the SRAM and then the remainder to offset 0xc00 in the SRAM.
It always enters at 0x804, though.

With this changeset, the RK3188 boot removes the TPL (stub) stage and
builds a single SPL binary that utilizes the early back-to-bootrom via
the boot0-hook.

Consequently, the passing of the saved boot params via pmu->os_reg[2]
is also removed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
ecfd71891a rockchip: back-to-bootrom: replace assembly-implementation with C-code
The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.

This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
b4806d6f1f arm: provide a PCS-compliant setjmp implementation
The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers.  One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.

To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00
Philipp Tomsich
ff143d5556 arm: mark save_boot_params_ret as a function
As no '.type' was set for save_boot_params_ret in start.S, binutils
did not track whether it was emitted as A32 or T32.  By properly
marking save_boot_params_ret as a potential function entry, we can
make sure that the compiler will insert the appropriate instructions
for branching to save_boot_params_ret both for call-sites emitted as
A32 and T32.

Reported-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2017-11-21 23:57:22 +01:00