Commit Graph

43722 Commits

Author SHA1 Message Date
rick
b841b6e946 nds32: Support AE3XX platform.
Support Andestech AE3xx platform: serial, timer device tree flow.

Signed-off-by: rick <rick@andestech.com>
2017-05-22 14:05:46 +08:00
rick
f5076f8698 nds32: Support AG101P timer DM.
Support AG101P timer device tree flow.

Signed-off-by: rick <rick@andestech.com>
2017-05-22 14:05:40 +08:00
rick
86132af799 nds32: Support AG101P serial DM.
Support AG101P serial device tree flow.

Signed-off-by: rick <rick@andestech.com>
2017-05-22 14:05:33 +08:00
Marek Vasut
adf3057f37 ARM: rmobile: salvator-x: Add R8A7796 support
Add minor ifdeffery and default board config for the Salvator-XS board
with R8A7796 M3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:28 +09:00
Marek Vasut
ad663de053 ARM: rmobile: salvator-x: Rename the defconfig to match the SoC
Rename the salvator-x_defconfig to r8a7795_salvator-x_defconfig in
preparation for the r8a7796 support on salvator-x board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:28 +09:00
Marek Vasut
4c443bdbf6 ARM: rmobile: salvator-x: Enable SCIF2 clock
There are two UARTs on the board, so enable the clock for the
second one as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
8f284e660b ARM: rmobile: salvator-x: Count all DRAM in all slots
Instead of counting only the DRAM in the first slot, count
all the DRAM in all slots and report it accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
d1018f5f9f ARM: rmobile: salvator-x: Add USB support
Add support for the EHCI USB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
fe2e8ff955 ARM: rmobile: salvator-x: Add DVFS and PMIC support
Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC,
but keep the CPU reboot option as a fallback.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
90e53f8b45 ARM: rmobile: salvator-x: Add RAVB ethernet support
Add support for the AVB ethernet on the Salvator-X board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
50fb0c451f ARM: rmobile: salvator-x: Add SD support
Add support for the SD card slots on the Salvator-X board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
8474681c3e ARM: rmobile: salvator-x: Adjust UART clock
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 .
Use the internal clock and ignore the early version of the chip.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:27 +09:00
Marek Vasut
60c48e42a0 ARM: rmobile: salvator-x: Zap redefined DECLARE_GLOBAL_DATA_PTR
The macro is used twice in the salvator-x board file, drop one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
f7fda5d1c0 ARM: rmobile: salvator-x: Set default device tree
Set default device tree file in the salvator-x_defconfig
and use it in the environment.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
c94cb71d95 ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board config
Move these two Kconfig symbols to the salvator-x_defconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
ae7a74a620 ARM: rmobile: salvator-x: Use BIT() macro in board file
Cosmetic change, replace (1 << (n)) with BIT(n) .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
2aef8f32b6 ARM: rmobile: Allow R8A7796 Salvator-X configuration
The Salvator-X can have both H3 and M3 CPU on it, drop the
select R8A7795 to allow both configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
2dea3b3e7b ARM: rmobile: Add R8A7796 support
Add Kconfig entry for the R8A7796 RCar M3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
e965c89008 ARM: rmobile: Handle R8A7796 r1.1 in the PRR code
The R8A7796 r1.1 reports itself as r2.0 , add quirk into the
PRR code to fix this report.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:26 +09:00
Marek Vasut
bc271a0051 ARM: rmobile: Add R8A7796 into the CPU table
Add entry for the R8A7796 RCar M3 SoC into the CPU info table.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
3a38c7d0d8 ARM: rmobile: Add R8A7795 into the CPU table
Add entry for the R8A7795 RCar H3 SoC into the CPU info table.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
a0f6404649 ARM: rmobile: Make the Gen3 SoC configurable
Allow selecting the Gen3 SoC in preparation for RCar M3 .
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
43c8352e3e ARM: rmobile: Update link address to match latest BL2
Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer,
which loads the U-Boot to 0x50000000 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
1b044aa8c5 ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOT
This Kconfig option is not used on any board, so drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
8d31fe2a64 ARM: rmobile: Import R8A7796 PFC and GPIO tables
Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release
from Renesas .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
0dfc2392f6 ARM: rmobile: Update R8A7795 PFC and GPIO tables
Sync the PFC and GPIO tables with the latest 3.5.3 release from
Renesas . This adds ES2.0 support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Hiroyuki Yokoyama
b7cebcb977 serial: sh: Add r8a7796 support
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22 04:38:25 +09:00
Marek Vasut
8ae51b6f32 net: ravb: Add Renesas Ethernet RAVB driver
Add driver for the Renesas Ethernet AVB block found in RCar H3/M3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Based on work of:
Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
2017-05-22 04:38:24 +09:00
Kouei Abe
1815c29738 gpio: rcar_gen3: Fix GPIO read support
This patch fixes to read the GPIO status after confirming the
INOUT setting.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2017-05-22 04:37:30 +09:00
Uri Mashiach
3ce3026a09 net: usb: mcs7830: fix non-DM ingress path
The mcs7830_recv() (non-DM) function discards good packets and tries to
process "bad" packets due to incorrect test condition.
Fix the condition and return the proper value as described in function
doc.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2017-05-21 16:44:04 +02:00
Tom Rini
a375ff8e14 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-05-18 17:17:45 -04:00
Tom Rini
753a4dde97 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-05-18 17:17:42 -04:00
Tom Rini
a0bdf7b31d Merge branch 'master' of git://git.denx.de/u-boot-usb 2017-05-18 17:17:39 -04:00
Jean-Jacques Hiblot
ad99abe8e7 ARM: dts: am335x-evm: disable mmc3
SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-18 17:17:11 -04:00
Tom Rini
7452946e7f scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override
The intention of having a -u-boot.dtsi file is to be able to make
changes to the provided upstream dts files as well as to be able to add
nodes.  Change the logic for adding the file from making it the last
included file at the top of the dts to being included at the end of the
file.

Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-18 17:17:01 -04:00
Stefano Babic
5c84ad097d Merge branch 'master' of git://git.denx.de/u-boot-imx
Signed-off-by: Stefano Babic <sbabic@denx.de>
2017-05-18 11:53:55 +02:00
Ley Foon Tan
d89e979c42 arm: socfpga: Enable build for Arria 10
Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:19 +02:00
Ley Foon Tan
9b21de7811 arm: socfpga: Add board files for the Arria10
Add support for the Arria10 SoCDK.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:19 +02:00
Ley Foon Tan
1b2594030d arm: socfpga: Add config and defconfig for Arria 10
Add config and defconfig for the Arria10 and update socfpga_common.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:19 +02:00
Ley Foon Tan
8f4c80c4fd arm: socfpga: Add SPL support for Arria 10
Add SPL support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
3d5f7c5af3 arm: dts: Add dts and dtsi for Arria 10
Device tree files for Arria 10

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
35b9800ff2 arm: socfpga: Add misc support for Arria 10
Add misc support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
caf36e1edb arm: socfpga: Add pinmux for Arria 10
Add pinmux support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
c887d48017 arm: socfpga: Add sdram header file for Arria 10
Add sdram header file for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
86f032e630 arm: socfpga: Add system manager for Arria 10
Add system manager register struct and macros for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Ley Foon Tan
177ba1f927 arm: socfpga: Add clock driver for Arria 10
Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
Ley Foon Tan
827e6a7e0d arm: socfpga: Add reset driver support for Arria 10
Add reset driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
Ley Foon Tan
d83b8193ad arm: socfpga: Add A10 macros
Add i2c, timer and other A10 macros.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
Ley Foon Tan
d1c559af5f arm: socfpga: Restructure misc driver
Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.

Change all uint32_t_to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
Ley Foon Tan
4ddd541d6c arm: socfpga: Restructure system manager
Restructure system manager in the preparation to support A10.
No functional change.

Change uint32_t to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00