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https://github.com/brain-hackers/u-boot-brain
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nds32: Support AG101P serial DM.
Support AG101P serial device tree flow. Signed-off-by: rick <rick@andestech.com>
This commit is contained in:
parent
a375ff8e14
commit
86132af799
@ -43,6 +43,7 @@ config MIPS
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config NDS32
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bool "NDS32 architecture"
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select SUPPORT_OF_CONTROL
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config NIOS2
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bool "Nios II architecture"
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@ -161,9 +161,13 @@ update_gp:
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*/
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call_board_init_f:
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li $sp, CONFIG_SYS_INIT_SP_ADDR
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li $r10, GD_SIZE /* get GD size */
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sub $sp, $sp, $r10 /* GD start addr */
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move $r10, $sp
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move $r0, $sp
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bal board_init_f_alloc_reserve
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move $sp, $r0
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bal board_init_f_init_reserve
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#ifdef CONFIG_DEBUG_UART
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bal debug_uart_init
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#endif
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li $r0, 0x00000000
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#ifdef __PIC__
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14
arch/nds32/dts/Makefile
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14
arch/nds32/dts/Makefile
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@ -0,0 +1,14 @@
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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dtb-$(CONFIG_TARGET_ADP_AG101P) += ag101p.dtb
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targets += $(dtb-y)
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DTC_FLAGS += -R 4 -p 0x1000
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PHONY += dtbs
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dtbs: $(addprefix $(obj)/, $(dtb-y))
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@:
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clean-files := *.dtb
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49
arch/nds32/dts/ag101p.dts
Normal file
49
arch/nds32/dts/ag101p.dts
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@ -0,0 +1,49 @@
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/dts-v1/;
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/ {
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compatible = "nds32 ag101p";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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aliases {
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uart0 = &serial0;
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} ;
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chosen {
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/* bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug bootmem_debug memblock=debug loglevel=7"; */
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bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug loglevel=7";
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stdout-path = "uart0:38400n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x40000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "andestech,n13";
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reg = <0>;
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/* FIXME: to fill correct frqeuency */
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clock-frequency = <60000000>;
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};
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};
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intc: interrupt-controller {
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compatible = "andestech,atnointc010";
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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serial0: serial@99600000 {
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compatible = "andestech,uart16550", "ns16550a";
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reg = <0x99600000 0x1000>;
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interrupts = <7 4>;
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clock-frequency = <14745600>;
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reg-shift = <2>;
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no-loopback-test = <1>;
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};
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};
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@ -8,5 +8,6 @@
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#ifndef _ASM_CONFIG_H_
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#define _ASM_CONFIG_H_
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#define CONFIG_LMB
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#endif
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@ -14,6 +14,12 @@
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DECLARE_GLOBAL_DATA_PTR;
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int arch_fixup_fdt(void *blob)
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{
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return 0;
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}
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#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
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defined(CONFIG_CMDLINE_TAG) || \
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defined(CONFIG_INITRD_TAG) || \
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@ -1,5 +1,7 @@
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CONFIG_NDS32=y
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CONFIG_TARGET_ADP_AG101P=y
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CONFIG_DEFAULT_DEVICE_TREE="ag101p"
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CONFIG_FIT=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_PROMPT="NDS32 # "
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CONFIG_CMD_MMC=y
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@ -12,4 +14,7 @@ CONFIG_CMD_FAT=y
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CONFIG_MMC=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_BAUDRATE=38400
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CONFIG_OF_CONTROL=y
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CONFIG_DM=y
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CONFIG_DM_SERIAL=y
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CONFIG_SYS_NS16550=y
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@ -20,8 +20,6 @@
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_GENERIC_GLOBAL_DATA
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/*
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* Definitions related to passing arguments to kernel.
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*/
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@ -35,6 +33,10 @@
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#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0x00500000
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#ifdef CONFIG_OF_CONTROL
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#undef CONFIG_OF_SEPARATE
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#define CONFIG_OF_EMBED
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#endif
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#else
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#ifdef CONFIG_MEM_REMAP
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#define CONFIG_SYS_TEXT_BASE 0x80000000
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@ -87,7 +89,9 @@
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE
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#ifndef CONFIG_DM_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#endif
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#define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */
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/*
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