Commit Graph

40649 Commits

Author SHA1 Message Date
Kever Yang
ae804cf4af dts: arm: rk3036: add usb vbus node
add fix regulator node for usb vbus power control.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Kever Yang
c70956052a config: rk3036: enable fix regulator
usb host vbus power is using gpio fix regulator, enable it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
1e352124b9 config: rk3036: enable configs for USB HOST
rk3036 using dwc2 usb controller, need enable relate configs for it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
0dffb28107 config: evb-rk3399: enable PWM_ROCKCHIP
PWM_ROCKCHIP need to enable for PWM regulator, this config
is missing during rebase and new patch set in previous submission.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
8aea45a745 evb-rk3399: deduced the dram node size when space reserved
The size dram node need to be deduced by the same amount of reserved space.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Andreas Färber
ef904bf28e arm: rockchip: Fix typo in ROCKCHIP_RK3288 help
UART,s -> UARTs, to avoid this spreading via copy&paste.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Andreas Färber
cf78150f41 arm: dts: Fix Rockchip sort order
Sort rk3036 before rk3288.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Keerthy
5483456e91 power: regulator: Add limits checking while setting current
Currently the specific set ops functions are directly
called without any check for min/max current limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixed checking of current limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:26 -07:00
Keerthy
eaadcf38dd power: regulator: Add limits checking while setting voltage
Currently the specific set ops functions are directly
called without any check for voltage limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed checking of voltate limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:58:09 -07:00
Tom Rini
ce4f2dbe1a Merge git://git.denx.de/u-boot-fdt 2016-11-25 17:40:02 -05:00
Tom Rini
ed77ccd014 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	arch/arm/Kconfig
2016-11-25 17:39:54 -05:00
Keerthy
2f5d532f3b power: regulator: Introduce regulator_set_value_force function
In case we want to force a particular value on a regulator
irrespective of the min/max constraints for testing purposes
one can call regulator_set_value_force function.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-25 10:00:04 -07:00
Andreas Färber
643f8d4c07 MAINTAINERS: Fix syntax and update filename for FDT
Let get_maintainers.pl pick up the new cmd/fdt.c.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-25 09:48:09 -07:00
York Sun
020198b0c7 image-fit: Fix compiling error caused by autoconf.h
Commit ec6617c3 includes autoconf.h in image-fit.c, causing conflict
for board odroid-xu3 which overwrites CONFIG_SYS_BOARD in header
file. Move the include higher and use linux/kconfig.h instead of
generated/autoconf.h.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
2016-11-23 10:40:08 -08:00
York Sun
f9dd8553f3 armv7: ls1021aiot: Fixing SPL compiling issues
To align with SPL change 38fed8ab and 693d4c9f, add Kconfig option
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to defconfig, and remove
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Feng Li <feng.li_2@nxp.com>
2016-11-23 10:39:41 -08:00
Marcel Ziswiler
136179bec1 colibri_pxa270: transition to driver model for serial
Add serial platform data to board file.
Enable driver model for PXA serial driver.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2016-11-23 13:53:20 +01:00
Marcel Ziswiler
fc127d184a colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason
With em humble DM and Kconfig migraters U-Boot binary size keeps
increasing. Drop a bunch of less needed stuff to save another precious
20+ KB.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2016-11-23 13:53:20 +01:00
Marcel Ziswiler
cbfa67a16b serial: pxa: integrate optional driver model handling
Optional driver model handling integration.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-23 13:53:20 +01:00
Marcel Ziswiler
d804a5e1c3 serial: pxa: use kconfig for serial configuration
Migrate the PXA serial driver to be configured via Kconfig.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-23 13:53:20 +01:00
Alison Wang
3db86f4bbd armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled
As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:40:24 -08:00
Alison Wang
e2c18e40b1 armv8: fsl-layerscape: SMP support for loading 32-bit OS
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:40:24 -08:00
Alison Wang
ec6617c397 armv8: Support loading 32-bit OS in AArch32 execution state
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.

The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.

Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:40:24 -08:00
Thomas Abraham
95e74a3df7 arm: exynos7420: remove custome low level init function
Remove the custom low-level initialization function and reuse the
default low-level initialization function. But this requires the
ARMV8_MULTIENTRY config option to be enabled for Exynos7420.

On Exynos7420, the boot CPU belongs to the second cluster and so
with ARMV8_MULTIENTRY config option enabled, the 'branch_if_master'
macro fails to detect the CPU as boot CPU. As a temporary workaround
the CPU_RELEASE_ADDR is set to point to '_main'.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:40:24 -08:00
Priyanka Jain
e87c673c20 armv8/fsl-lsch3: Update code to release secondary cores
NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.

Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:38:48 -08:00
Priyanka Jain
9ae836cde7 armv8: fsl-layerscape: Add NXP LS2088A SoC support
The QorIQ LS2088A SoC is built on layerscape architecture.

It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:37:54 -08:00
Priyanka Jain
d5df606d17 armv8: fsl-layerscape : Check SVR for initializing TZASC
LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TZASC

Hence, skip initializing TZASC for Ls2080A based on SVR

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:37:49 -08:00
Priyanka Jain
7cfbb4abe3 armv8: fsl-layerscape: Update TZASC registers type
TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:37:41 -08:00
Priyanka Jain
f6b96ff665 armv8: lsch3: Use SVR based timer base address detection
Timer controller base address has been changed from
LS2080A SoC (and its personalities) to new SoCs like
LS2088A, LS1088A.

Use SVR based timer base address detection to avoid compile time #ifdef.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:37:31 -08:00
Priyanka Jain
f6a70b3a92 armv8: lsch3: Add generic get_svr() in assembly
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-22 11:37:07 -08:00
Jagan Teki
543bd27353 MAINTAINERS: SUNXI: Update maintainership
Add Jagan and Maxime as Maintainers for SUNXI

Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-22 09:07:26 -05:00
Tom Rini
081abb1309 Merge branch 'master' of git://git.denx.de/u-boot-spi 2016-11-22 07:57:23 -05:00
Radu Bacrau
1f3232d2a1 sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G
This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.

Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-22 11:58:59 +05:30
Tom Rini
ca39bd8ce1 am57xx: Remove unused variable warnings
Starting with the changes to fix USB host on am57xx/am43xx we stopped
using usb_otg_ss1/related stuff and but we hadn't been enabling the
relevant options to cause the warnings until just recently.

Fixes: 55efadde7e (ARM: AM57xx: AM43xx: Fix USB host)
Fixes: a48d687c57 (configs: am57xx: Enable download gadget)
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:58 -05:00
Yann E. MORIN
c294873179 fastboot: simplify the Kconfig logic
Currently, the fastboot item in menuconfig is a comment followed by a
boolean option withan empty prompt, followed by a menu:

        *** FASTBOOT ***
    [*]
          Fastboot support  --->

This is not "nice-looking" at all...

Change the logic to make the boolean option a "menuconfig" rather than a
mere "config", so that all dependent options gets groupped under a menu.
The layout is now:

        *** FASTBOOT ***
    [*] Fastboot support  --->

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:33 -05:00
Adam Ford
12262340d5 ARM: OMAP3_LOGIC: Update MTD Partition Table
The previous partition table did not support a separate device tree
and the kernel size was limited to 4MB.  This update shows the
location of the device tree (labeled as spl-os) for those who
want to use Falcon Mode or use U-Boot to store the Flattened
Device Tree (FDT) to NAND without appending it to the kernel.

This also grows the kernel to 6MB since 4MB was becomming tight

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:33 -05:00
Adam Ford
d5584e4361 ARM: OMAP3_LOGIC: Remove FIT Support
Commit ("2cd1ff84037a: OMAP3_LOGIC: Setup defconfig to enable
SPL and NAND booting") accidentally enabled FIT support.

This patch removes the FIT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:32 -05:00
Adam Ford
b15e7c1727 ARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode
The memory map defined in commit ("49c7303f0e52: OMAP3: Enable SPL
on omap3_logic) was used by a copy-paste of another board without
fully understanding how the map works in Falcon mode.  This patch
undoes the customization and uses the default SPL Memory Map
for OMAP3.

When building the uImage, set LOADADDR=0x82000000 and Falcon
mode should properly load.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:32 -05:00
Cédric Schieli
ade243a211 rpi: passthrough of the firmware provided FDT blob
Raspberry firmware used to pass a FDT blob at a fixed address (0x100),
but this is not true anymore. The address now depends on both the
memory size and the blob size [1].

If one wants to passthrough this FDT blob to the kernel, the most
reliable way is to save its address from the r2/x0 register in the
U-Boot entry point and expose it in a environment variable for
further processing.

This patch just does this:
- save the provided address in the global variable fw_dtb_pointer
- expose it in ${fdt_addr} if it points to a a valid FDT blob

There are many different ways to use it. One can, for example, use
the following script which will extract from the tree the command
line built by the firmware, then hand over the blob to a previously
loaded kernel:

fdt addr ${fdt_addr}
fdt get value bootargs /chosen bootargs
bootz ${kernel_addr_r} - ${fdt_addr}

Alternatively, users relying on sysboot/pxe can simply omit any FDT
statement in their extlinux.conf file, U-Boot will automagically pick
${fdt_addr} and pass it to the kernel.

[1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-11-21 14:07:32 -05:00
Cédric Schieli
3e10fcde3f arm: add save_boot_params for ARM1176
Implement a hook to allow boards to save boot-time CPU state for later
use. When U-Boot is chain-loaded by another bootloader, CPU registers may
contain useful information such as system configuration information. This
feature mirrors the equivalent ARMv7 feature.

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-11-21 14:07:31 -05:00
Andrew Duda
83dd98e012 image: Combine image_sig_algo with image_sign_info
Remove the need to explicitly add SHA/RSA pairings. Invalid SHA/RSA
pairings will still fail on verify operations when the hash length is
longer than the key length.

Follow the same naming scheme "checksum,crytpo" without explicitly
defining the string.

Indirectly adds support for "sha1,rsa4096" signing/verification.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:31 -05:00
Andrew Duda
0c1d74fda7 image: Add crypto_algo struct for RSA info
Cut down on the repetition of algorithm information by defining separate
checksum and crypto structs. image_sig_algos are now simply pairs of
unique checksum and crypto algos.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:31 -05:00
Andrew Duda
da29f2991d rsa: Verify RSA padding programatically
Padding verification was done against static SHA/RSA pair arrays which
take up a lot of static memory, are mostly 0xff, and cannot be reused
for additional SHA/RSA pairings. The padding can be easily computed
according to PKCS#1v2.1 as:

  EM = 0x00 || 0x01 || PS || 0x00 || T

where PS is (emLen - tLen - 3) octets of 0xff and T is DER encoding
of the hash.

Store DER prefix in checksum_algo and create rsa_verify_padding
function to handle verification of a message for any SHA/RSA pairing.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:30 -05:00
Andrew Duda
5300a4f933 rsa: cosmetic: rename pad_len to key_len
checksum_algo's pad_len field isn't actually used to store the length of
the padding but the total length of the RSA key (msg_len + pad_len)

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:30 -05:00
Tom Rini
187f9dc3f7 TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2
With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:29 -05:00
Tom Rini
983e37007d arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories.  All refernces to the former locations are updated to
the current locations.  For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:29 -05:00
Tom Rini
272686eb75 arm: Introduce ARCH_OMAP2
To start consolidating various TI-related code, introduce the ARCH_OMAP2
symbol.  While we have removed omap2-specific boards some time ago,
matching up with the kernel naming here will help overall.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:28 -05:00
Stefan Brüns
b18491520f fs-test.sh: Update expected results
After the latest changes, ext4 no longer has any fails.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2016-11-21 14:07:28 -05:00
Stefan Brüns
66a47ff2d8 ext4: Allow reading files with non-zero offset, clamp read len
Support was already implemented, but not hooked up. This fixes several
fails in the test cases.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2016-11-21 14:07:27 -05:00
Stefan Brüns
f81db56f2f ext4: Fix handling of sparse files
A sparse file may have regions not mapped by any extents, at the start
or at the end of the file, or anywhere between, thus not finding a
matching extent region is never an error.

Found by python filesystem tests.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-11-21 14:07:27 -05:00
Stefan Brüns
d8c1e0331a test/py: expose config and log as session scoped fixture
If a test uses a fixture which is expensive to setup, the fixture can
possibly created with session or module scope. As u_boot_console has
function scope, it can not be used in this case.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2016-11-21 14:07:27 -05:00