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armv8: lsch3: Add generic get_svr() in assembly

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Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Priyanka Jain 2016-11-17 12:29:51 +05:30 committed by York Sun
parent 40836e215a
commit f6a70b3a92
3 changed files with 14 additions and 3 deletions
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2
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
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@ -306,12 +306,14 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
return -1; /* cannot identify the cluster */
}
#ifndef CONFIG_FSL_LSCH3
uint get_svr(void)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
return gur_in32(&gur->svr);
}
#endif
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)

9
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
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@ -13,6 +13,9 @@
#ifdef CONFIG_MP
#include <asm/arch/mp.h>
#endif
#ifdef CONFIG_FSL_LSCH3
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#endif
ENTRY(lowlevel_init)
mov x29, lr /* Save LR */
@ -199,6 +202,12 @@ ENTRY(lowlevel_init)
ENDPROC(lowlevel_init)
#ifdef CONFIG_FSL_LSCH3
.globl get_svr
get_svr:
ldr x1, =FSL_LSCH3_SVR
ldr w0, [x1]
ret
hnf_pstate_poll:
/* x0 has the desired status, return 0 for success, 1 for timeout
* clobber x1, x2, x3, x4, x6, x7

6
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
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@ -27,6 +27,7 @@
#define CONFIG_SYS_FSL_PMU_CLTBENR (CONFIG_SYS_FSL_PMU_ADDR + \
0x18A0)
#define FSL_PMU_PCTBENR_OFFSET (CONFIG_SYS_FSL_PMU_ADDR + 0x8A0)
#define FSL_LSCH3_SVR (CONFIG_SYS_FSL_GUTS_ADDR + 0xA4)
#define CONFIG_SYS_FSL_WRIOP1_ADDR (CONFIG_SYS_IMMR + 0x7B80000)
#define CONFIG_SYS_FSL_WRIOP1_MDIO1 (CONFIG_SYS_FSL_WRIOP1_ADDR + 0x16000)
@ -153,7 +154,7 @@
#define TP_CLUSTER_INIT_MASK 0x0000003f /* initiator mask */
#define TP_INIT_PER_CLUSTER 4
/* This is chassis generation 3 */
#ifndef __ASSEMBLY__
struct sys_info {
unsigned long freq_processor[CONFIG_MAX_CPUS];
unsigned long freq_systembus;
@ -317,6 +318,5 @@ struct ccsr_reset {
u32 ip_rev2; /* 0xbfc */
};
uint get_svr(void);
#endif /*__ASSEMBLY__*/
#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */