3 Commits

Author	SHA1	Message	Date
Bin Meng	abddcd52ab	x86: fsp: Consolidate Azalia header file ... So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>	2017-10-19 11:37:51 +08:00
Bin Meng	fffad9264a	x86: braswell: Add FSP configuration ... Add FSP related configuration for Braswell. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>	2017-09-16 14:57:44 +08:00
Bin Meng	de9ac9a1b9	x86: Add Intel Braswell SoC support ... This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>	2017-09-16 14:57:44 +08:00