Support RAM and MMC boot mode in SPL also with SPL_FIT images.
In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
-d bl31.bin atf.ub
cp spl/boot.bin <sdcard fat partition>
cp atf.ub <sdcard fat partition>
cp u-boot.bin <sdcard fat partition>
2) Boot flow with full U-Boot(EL3):
cp spl/boot.bin <sdcard>
cp u-boot*.img <sdcard>
3) emmc boot mode
dd if=/dev/zero of=sd.img bs=1024 count=1024
parted sd.img mktable msdos
parted sd.img mkpart p fat32 0% 100%
kpartx -a sd.img
mkfs.vfat /dev/mapper/loop0p1
mount /dev/mapper/loop0p1 /mnt/
cp spl/boot.bin /mnt
cp u-boot.img /mnt
cp u-boot.bin /mnt
cp atf.ub /mnt
umount /dev/mapper/loop0p1
kpartx -d sd.img
cp sd.img /tftpboot/
and program it via u-boot
tftpb 10000 sd.img
mmcinfo
mmc write 10000 0 $filesize
mmc rescan
mmc part
ls mmc 0
psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.
The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The GIC ranges in the zynqmp device tree are only 4kb aligned. Since
commit 12e14066f we automatically deal with aliases GIC regions though,
so we can map them transparently into guests even on 64kb page size
systems.
This patch makes use of that features and sets GICC and GICV to 64kb
aligned and sized regions.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for the zynqmpimage to mkimage.
Only basic functionality is supported without encryption and register
initialization with one partition which is filled by U-Boot SPL.
For more detail information look at Xilinx ZynqMP TRM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Support loading FIT in SPL for RAM bootmode.
CONFIG_SPL_LOAD_FIT_ADRESS points to address where FIT image is stored
in memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
If ps7_post_config() is defined call it. It is enabling for example
level shifters for PL bitstreams.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Call this function before passing control from SPL.
For fpga case it is necessary to enable for example level shifters
when bitstream is programmed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for on board eeprom with programmed MAC for using in u-boot
to have uniq address for every board.
Most of the time uniq MAC address is on a label on the board.
If address is not programmed use these command to program it.
On zcu102:
ZynqMP> mm.b 0
00000000: 00 ? 00
00000001: a0 ? 0a
00000002: 35 ? 35
00000003: 02 ? 02
00000004: 00 ? ef
00000005: 00 ? 67
00000006: 00 ? q
i2c dev 5
i2c write 0 54 20 6
i2c md 54 20
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Commit 9f56917ab8 ("dm: core: make simple-bus compatible to
simple-mfd") made possible to import the following commit:
Linux commit: bc5ba9b98435bf76d92e0954da1784695aa449f1
The SLCR (System-Level Control Registers) block is an MFD (Multi
Function Device) rather than a bus.
"simple-mfd" seems a more suitable compatible string than "simple-bus".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add zynq_gpio_get_function() which return status on gpio pin.
This function enables gpio status command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Since commit ad1ecd2063 ("fdt: Build a U-Boot binary without device
tree"), u-boot-dtb.img is identical to u-boot.img, so SPL can always
load u-boot.img whether CONFIG_OF_SEPARATE is defined or not.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The spl_parse_image_header() can return 0 and it is not an error.
Only treat non-zero return value as an error.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.
v2: Fixed commit subject line to correct cpu
Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
Coverity has recently added a check that will find when we don't check
the return code from fstat(2). Copy/paste the checking logic that
print_deps() has with an appropriate re-wording of the perror() message.
[ Linux commit : 46fe94ad18aa7ce6b3dad8c035fb538942020f2b ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
OF_LIST can't remain empty that's why setup it up to default DTB.
If it is empty u-boot.img is created without FDT partition:
For example:
./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a
0x8000000 -e 0 -n "U-Boot 2016.05-rc3 ..." -E -b -d u-boot-nodtb.bin u-boot.img
Can't set 'timestamp' property for '' node (FDT_ERR_NOSPACE)
FIT description: Firmware image with one or more FDT blobs
Created: Wed May 4 15:02:52 2016
Image 0 (firmware@1)
Description: U-Boot 2016.05-rc3-00080-gff2e12ae22a8-dirty for zynqmp
board
Created: Wed May 4 15:02:52 2016
Type: Firmware
Compression: uncompressed
Data Size: unavailable
Architecture: ARM
Load Address: 0x08000000
Default Configuration: 'conf@1'
Configuration 0 (conf@1)
Description: unavailable
Kernel: unavailable
And then image like this doesn't contain description and link to FDT and
can't boot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When FDT is not present in the image user doesn't get any error what's
wrong. Print error message if LIBCOMMON_SUPPORT is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Seris-cc: uboot
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some build systems want to be quiet unless there is a problem. At present
mkimage displays quite a bit of information when generating a FIT file. Add
a '-q' flag to silence this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This function returns an error code and its caller may be able to fix the
error. For example fit_handle_file() expands the device tree to fit if there
is a lack of space.
In this case the caller does not want an error displayed. It is confusing,
since it suggests that something is wrong, when it fact everything is fine.
Drop the error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 4f144a4164 "malloc: work around some memalign fragmentation
issues" enhanced memalign() so that it can succeed in more cases where
heap fragmentation is present. However, it did not solve as many cases
as it could. This patch enhances the code to cover more cases.
The alignment code works by allocating more space than the user requests,
then adjusting the returned pointer to achieve alignment. In general, one
must allocate "alignment" bytes more than the user requested in order to
guarantee that alignment is possible. This is what the original code does.
The previous enhancement attempted a second allocation if the padded
allocation failed, and succeeded if that allocation just happened to be
aligned; a fluke that happened often in practice. There are still cases
where this could fail, yet where it is still possible to honor the user's
allocation request. In particular, if the heap contains a free region that
is large enough for the user's request, and for leading padding to ensure
alignment, but has no or little space for any trailing padding. In this
case, we can make a third(!) allocation attempt after calculating exactly
the size of the leading padding required to achieve alignment, which is
the minimal over-allocation needed for the overall memalign() operation to
succeed if the third and second allocations end up at the same location.
This patch isn't checkpatch-clean, since it conforms to the existing
coding style in dlmalloc.c, which is different to the rest of U-Boot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Merge the parsing of layout aware and layout unaware eeprom commands into
one parsing function. With this change, layout aware commands now follow
the eeprom read and eeprom write conventions of making i2c bus and i2c address
parameters optional.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Update eeprom_execute_command() and related code to accommodate both layout
aware and layout unaware functions.
No functional changes.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Make eeprom_execute_command have ulong for i2c_addr]
Signed-off-by: Tom Rini <trini@konsulko.com>
Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6
CPUs. Allow building U-Boot for such systems by selecting
CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
We always build for a mips32 or higher ISA, so this ".set mips32"
directive is redundant. Once MIPSr6 support is added it will become
harmful since some instruction encodings change & this directive will
cause the older encodings to be incorrectly emitted instead of the
appropriate ones for the build.
In preparation for supporting MIPSr6, remove this redundant directive.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way
that we currently select release 1 or release 2 targets. MIPSr6 is not
entirely backwards compatible with earlier releases of the architecture.
Some instructions are encoded differently, some are removed, some are
reused, so it is not practical to run U-Boot built for earlier revisions
on a MIPSr6 system. Update their Kconfig help text to reflect that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Rather than having the values for CONFIG_SYS_CPU depend upon each
architecture revision, have them depend upon the more general
CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the
architecture revisions.
This is done in preparation for adding MIPSr6 support, which would
otherwise need to introduce new cases here.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Add support for the Atheros AR934x WiSoCs. This patchs adds complete
system init, including PLL and DRAM init, both of which happen from
full C environment, since the AR934x has proper SRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Add code to ungate the ethernet controller on ar933x and ar934x .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Add node for both ethernet controllers in the ar933x.
The PHY is attached only to the first ethernet controller.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Add code to ungate the USB controller on ar933x and ar934x .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Add generic EHCI node for the ChipIdea EHCI controller in the ath79.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
The indent in this file triggers my OCD, so fix it. Replace multiple
spaces with tabs and align the values in one column.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:
In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default]
int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
^
include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
