Previous patches allow UEFI secure variables to be stored in an RPMB
device using OPTEE. Add a config for the lx2160a hardware so the feature
gets at least compiled.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Remove superfluous differences to lx2160ardb_tfa_defconfig.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If OP-TEE is compiled with an EDK2 application running in secure world
it can process and store UEFI variables in an RPMB.
Add documentation for the config options enabling this.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add myself as maintainer for the OP-TEE related UEFI variable storage.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With the previous patches that use OP-TEE and StandAloneMM for UEFI
variable storage we've added functionality for efi_query_variable_info.
So let's add the relevant command to efidebug and retrieve information
about the container used to store UEFI variables
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In OP-TEE we can run EDK2's StandAloneMM on a secure partition.
StandAloneMM is responsible for the UEFI variable support. In
combination with OP-TEE and it's U-Boot supplicant, variables are
authenticated/validated in secure world and stored on an RPMB partition.
So let's add a new config option in U-Boot implementing the necessary
calls to OP-TEE for the variable management.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Pipat Methavanitpong <pipat1010@gmail.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In Arm devices OP-TEE has the ability to run StandAloneMM (from EDK2)
in a separate partition and handle UEFI variables.
A following patch introduces this functionality.
Add the headers needed for OP-TEE <--> StandAloneMM communication
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Virtually all callers of this function do the rounding on their own.
Some do it right, some don't. Instead of doing this in each caller,
do the rounding in efi_add_memory_map(). Change the size parameter
to bytes instead of pages and remove aligning and size calculation in
all callers.
There is no more need to make the original efi_add_memory_map() (which
takes pages as size) available outside the module. Thus rename it to
efi_add_memory_map_pg() and make it static to prevent further misuse
outside the module.
Signed-off-by: Michael Walle <michael@walle.cc>
Add missing comma in sunxi_display.c.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable CONFIG_PCI_INIT_R for qemux86 and qemux86-64 pci enumeration during
boot in order to eliminate the custom preboot commands in
include/configs/qemu-x86.h.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they
are without that config option enabled. However, there are cases such as DM
PCI-based Ethernet devices that need the PCI bus enumerated so that they
can be discovered by their drivers.
Currently, to solve this, some boards enumerate the pci bus using
"pci enum" preboot command, while others do it manually in board files
(in board_init/board_late_init/etc. functions).
In order to possibly make the pci enumeration process uniform across all
boards, introduce CONFIG_PCI_INIT_R Kconfig option.
This change also preserves the current behavior in the !DM_PCI case
(pci_init is run unconditionally at boot).
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Use IS_ENABLED() instead of #ifdef in should_load_env and initr_env
functions.
No functional change intended.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
- A number of symbol name consistency updates
- JFFS2 bugfix
- Use /* fallthrough */ for now to help at least gcc know when we're
intentionally not 'break;'ing in a switch statement, we'll adopt
fallthrough; later on.
- Assorted other fixes
If "object=" is specified in "keydir" when using the pkcs11 engine do
not append another "object=<key-name-hint>". This makes it possible to
use object names other than the key name hint. These two string
identifiers are not necessarily equal.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Bastian Krause <bst@pengutronix.de>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled.
Let's use it consistently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GCC recognizes /* fallthrough */ if -Wimplicit-fallthrough=3 is enabled.
Let's use it consistently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_SYS_SDRAM_BASE maybe zero. Avoid a build warning when compiling with
-Wtype-limits.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
A large number of boards call preloader_console_init unconditionally.
Currently, they fail to build with CONFIG_SPL_SERIAL=n, because the
function is undefined in that case. To fix the build, always define
preloader_console_init, but make it no-op when CONFIG_SPL_SERIAL=n.
For the few boards that did check for CONFIG_SPL_SERIAL before calling
preloader_console_init, remove the checks, since the function can now
be called unconditionally.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
File 'defconfig' is a build artifact of 'make savedefconfig'.
Remove it when cleaning.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The inode list uses version and ino, the dirent list uses version and pino.
This information is collected during scanning, reducing accesses to flash
and significantly speeding up ls and read.
Signed-off-by: Petr Borsodi <petr.borsodi@i.cz>
Obsolete nodes (ie. without the JFFS2_NODE_ACCURATE flag) were ignored
because they had seemingly invalid crc. This could lead to finding
the phantom node header in obsolete node data.
Signed-off-by: Petr Borsodi <petr.borsodi@i.cz>
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
The SPL linker script had been left in arch/$(ARCH)/cpu/$(CPU)/$(SOC);
therefore move it to the already-established arch/$(ARCH)/mach-$(SOC)
location.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
The comment immediately above the block of machine directory names implored
users to keep the macro names sorted, but, alas, this is no longer the case.
Put the list of machine directory names back in alphanumerical order by
CONFIG_* macro name, as the comment asks. Sort all the symbols as though they
all followed the convention of having the string "ARCH_" in the middle of
their definitions.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Following the example of most other SoCs in arch/$(ARCH)/cpu/$(CPU)/$(SOC)
move the lpc32xx code from arch/arm/cpu/arm926ejs/lpc32xx to
arch/arm/mach-lpc32xx.
Following the checklist from
commit 01f1445630 ("ARM: prepare for moving SoC sources into mach-*"):
[1] move files from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpx32xx
[2] add machine entry to arch/arm/Makefile
[3] remove "obj-y += ..." from arch/arm/cpu/arm926ejs/Makefile
[4] fix the Kconfig file path in arch/arm/Kconfig
[5] (no MAINTAINERS update)
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
stdlib.h is the header for malloc since at least c89/c90.
There is no system malloc.h on OpenBSD and trying to use malloc.h here
falls back to the U-Boot malloc.h breaking the build of qemu_arm64.
Fixes: 336d4615f8 ("dm: core: Create a new header file for 'compat' features")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
This code dates back to 2006, commit 483a0cf804 ("Fixes for gcc 3.4
based m68k toolchain,").
GCC 3.4 is so old. We do not support it.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
At present the MD5 option cannot be enabled by board configs since it has
no Kconfig name. It is generally enabled, so long as FIT support is
present. But not all boards use FIT, particularly in SPL
Fix this and add an option for SPL as well. This allows board code to call
md5() even if FIT support is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
The speed member actually uses an enum, so add this to the comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This avoids needless rebuilding.
Fixes: 2f57c95100 ("spl: dm: Make it possible for the SPL to pick its own DTB from a FIT")
CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The dts dir must exists when running this rule.
That missing dependency broke e.g. "make -j" for the am65x targets.
Fixes: 2f57c95100 ("spl: dm: Make it possible for the SPL to pick its own DTB from a FIT")
CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
(add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
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Merge tag 'u-boot-stm32-20200514' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
(add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
- sync RPi4's env size with other RPi configs
- add kconfig option to reserver more pages in the EFI mem map
- add support for SDMA which is used by RPi4
- fix corner case boot bug for RPi3 32-bit
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Merge tag 'rpi-next-2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- fix phy configuration for RPi4's bcmgenet
- sync RPi4's env size with other RPi configs
- add kconfig option to reserver more pages in the EFI mem map
- add support for SDMA which is used by RPi4
- fix corner case boot bug for RPi3 32-bit
DT alignment with Linux 5.7-rc2, including the kernel commits
431c89e6f323 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
79e965053872 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
877db62ea516 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
7519e95ba5f8 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
f68e2dbc591a ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
d6210da4f8bf ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
b65b6fc56925 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
1c1cf5996cfb ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
bef15fc0fad9 ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
b7fc0a87b9ac ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
a5e557655285 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
8bc631b650a6 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
fccd6a577bb3 ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
cc775a83db65 ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
c5fae093511b ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
9879e2165758 ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
82ac8a81f985 ARM: dts: stm32: add USB OTG full support on stm32mp151
8714b26e2863 ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
a7959919709e ARM: dts: stm32: Add UART8 pins A pinmux entry on stm32mp1
4d7c53a684da ARM: dts: stm32: Add USART3 pins A pinmux entry on stm32mp1
80ab128332ee ARM: dts: stm32: Add SAI2A pins B pinmux entry on stm32mp1
ab7f98c0c546 ARM: dts: stm32: Add Ethernet0 RMII pins A pinmux entry on stm32mp1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
When the CK_MPU used PLL1_MPUDIV, the current rate is
wrong. The clock must use stm32mp1_mpu_div as a shift
value. Fix the check value used to enter PLL_MPUDIV.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to
“STM32 SD/MMC”.
This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the
displayed name "STM32 SDMMC2" is confusing for user, between the
instance of SDMMC and the device identifier of MMC.
For example on EV1 board, we have:
STM32MP1> mmc list
STM32 SDMMC2: 0 (SD)
STM32 SDMMC2: 1 (eMMC)
Changed to more clear:
STM32MP1> mmc list
STM32 SD/MMC: 0 (SD)
STM32 SD/MMC: 1 (eMMC)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate cache on DDR to improve the accesses to DDR used by SPL:
- CONFIG_SPL_BSS_START_ADDR
- CONFIG_SYS_SPL_MALLOC_START
Cache is configured only when DDR is fully initialized,
to avoid speculative access and issue in get_ram_size().
Data cache is deactivated at the end of SPL, to flush the data cache
and the TLB.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate the data cache in SPL and in U-Boot before relocation.
In arch_cpu_init(), the function early_enable_caches() sets the early
TLB, early_tlb[] located .init section, and set cacheable:
- for SPL, all the SYSRAM
- for U-Boot, all the DDR
After relocation, the function enable_caches() (called by board_r)
reconfigures the MMU with new TLB location (reserved in
board_f.c::reserve_mmu) and re-enable the data cache.
This patch allows to reduce the execution time, particularly
- for the device tree parsing in U-Boot pre-reloc stage
(dm_extended_scan_fd =>dm_scan_fdt)
- in I2C timing computation in SPL (stm32_i2c_choose_solution())
For example, the result on STM32MP157C-DK2 board is:
1,6s gain for trusted boot chain with TF-A
2,2s gain for basic boot chain with SPL
For information, as TLB is added in .data section, the binary size
increased and the SPL load time by ROM code increased (30ms on DK2).
But early malloc can't be used for TLB because arch_cpu_init()
is executed before the early poll initialization done in spl_common_init()
called by spl_early_init() So it too late for this use case.
And if I initialize the MMU and the cache after this function it is
too late, as dm_init_and_scan and fdt parsing is also called in
spl_common_init().
And .BSS can be used in board_init_f(): only stack and global can use
before BSS init done in board_init_r().
So .data is the better solution without hardcoded location but if you
have size issue for SPL you can deactivate cache for SPL only
(with CONFIG_SPL_SYS_DCACHE_OFF).
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The SPI NOR nWP line is connected to GPIO PF7 on the SoM,
pull the GPIO line high by default to clear SPI NOR WP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>