This patch removes warp7_secure_defconfig. A previous patch set
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y on the unsecure WaRP7 config. Fabio asked
if I could confirm that the NXP and upstream kernels will boot on the WaRP7
with CONFIG_ARMV7_BOOT_SEC_DEFAULT=y. I can confirm that this is the case,
so there's no need to support the secure defconfig - drop it now.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
mx7dsabresd_secure_defconfig was introduced to allow booting NXP kernel
that has CAAM support and needs to boot in secure mode.
Instead of keeping two different config targets for the same board,
remove mx7dsabresd_secure_defconfig and select
CONFIG_ARMV7_BOOT_SEC_DEFAULT inside mx7dsabresd_defconfig so that
this target could be used to boot both mainline and the vendor kernel.
This makes maintenance task easier and avoid potentially confusion
for the end user.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
setexpr allows us to do arithmetic for env variables - something that is
both useful and required when doing HAB authentication without hard-coding
HAB load addresses.
This patch enables CMD_SETEXPR for the WaRP7 defconfig.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This patch enables CONFIG_BOOTM_TEE. Once enabled its possible to
chain-load Linux through OPTEE.
Loading kernel to 0x80800000
=> run loadimage
Load FDT to 0x83000000
=> run loadfdt
Load OPTEE to 0x84000000
=> fatload mmc 0:5 0x84000000 /lib/firmware/uTee.optee
Then chain-load to the kernel via OPTEE
=> bootm 0x84000000 - 0x83000000
Image Name:
Image Type: ARM Trusted Execution Environment Kernel Image (uncompressed)
Data Size: 249844 Bytes = 244 KiB
Load Address: 9dffffe4
Entry Point: 9e000000
Verifying Checksum ... OK
Loading Kernel Image ... OK
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Various function associated with booting the WaRP7 in High Assurance Boot
(HAB) mode are enabled by switching on CONFIG_SECURE_BOOT.
This patch enables CONFIG_SECURE_BOOT for the WaRP7 defconfig.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
In order to sign images with the IMX code-signing-tool (CST) we need to
know the load address of a given image. The best way to derive this load
address is to make it into a define - so that u-boot.cfg contains the
address - which we can then parse when generating the IMX CST headers.
This patch makes the OPTEE_LOAD_ADDR available via u-boot.cfg for further
parsing by external tools.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Requires setting CONFIG_OPTEE=y and setting an OPTEE TrustZone DRAM base in
include/configs/warp7.h.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The E2 Silk port was broken since some time. This patch updates
the E2 Silk port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The port is missing support for I2C1 for DA9063 reset, since the
I2C driver needs to be converted to DM and DT probing. That's not
an issue for this patch though, since the reset was broken on Silk
since forever.
Subtle ARC fixes for v2018.05-RC3
These are only very subtle clean-ups here and there including:
* Correctly specified CPU freq for HSDK
(production boards are all shipped with 500MHZ as opposed
to early batch running at 1GHz)
* Addition of SNPS internal group email to MAINTAINERS file
* Switch to Hush shell on AXS10x boards
The M2 Koelsch port was broken since some time. This patch updates
the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CPU on HSDK board runs at 500MHz after preloader so fix
wrong CPU frequency value in hsdk_defconfig.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
None of the SoCFPGA platforms will support EFI/ISO partition types that
is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2
partition type.
This is needed to help limit the size of the SPL to within the 64k limit
that is required for SoCFPGA.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Enable fitImage support to be on the right side of the millenium.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The SDHI is not routed to a slot on the Eagle, so disable it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the RPC QSPI driver on R8A77970 V3M Eagle and configure
the environment layout to match that used by old U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
We enabled CONFIG_ISO_PARTITION by default for distro boot, so that U-Boot
could load distro images that usually get shipped as iso images. These images
usually come with a board agnostic boot environment.
However, there is very little point in having ISO support enabled (for anyone
really) in SPL, as the whole idea of SPL is to load U-Boot proper which again
is board specific. So the fact that we enable ISO support in U-Boot proper does
not mean at all that we want ISO support in U-Boot SPL.
Hence, let's remove the Kconfig dependency. Along the way, let's also clean up
all those default configs that disabled SPL ISO support.
Signed-off-by: Alexander Graf <agraf@suse.de>
We only use coreboot as a target on x86 platforms, since on ARM platforms
U-Boot always runs as the primary boot loader. Rename the coreboot-x86
platform to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This changes some boards' default FRAMEBUFFER_VESA_MODE to use 32-bit
pixel format for better VxWorks compatibility.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop the CONFIG_MMC_RENESAS_TUNING symbol from Gen3 configs.
This symbol is no longer used after the Matsushita SDHI driver,
instead the renesas-sdhi driver uses CONFIG_MMC_HS200_SUPPORT
to discern whether the tuning support should be compiled in.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
--
V2: Submit this on top of configs which are actually in mainline
There is currently no use for building the SPL anymore, since the
SPI loader can easily be replaced by TPL and TPL does load U-Boot
directly. Upgrade TPL to SPL and replace what used to be SPL with
it. This way we build the U-Boot sources only twice, not thrice.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Shrink the TPL by using tiny printf and tiny memset by default.
This removes the biggest symbol -- vsnprintf_internal -- from
the TPL and reduces the text segment by about 2 kiB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The H2 Stout port was broken since some time. This patch updates
the H2 Stout port to use modern frameworks, DM, DT probing, SPL
and TPL for the preloading and puts it on par with the M2 Porter
board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- For am335x_pdu001 we do not want the CPSW driver, drop it
- Re-sync the defconfig for am43xx_evm_rtconly as it came in after the
patch that converted CPSW to Kconfig was posted but before it was
applied.
- Drop empty section / comments from pengwyn
- Drop empty section / comments from baltos and drop unused
CONFIG_SPL_NET_VCI_STRING (it does not enable CONFIG_SPL_NET_SUPPORT
currently and SPL_NET_VCI_STRING has been migrated already).
Cc: Felix Brack <fb@ltec.ch>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Fixes: f02b8d1761 ("Migrate CONFIG_DRIVER_TI_CPSW to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable the HS200 on RCar Gen3 platforms, since the SDHI core supports it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since the Renesas SDHI has it's own custom driver sharing the
common code with Uniphier one, adjust the Kconfig entries.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable the HUSH shell, since it is far more capable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add JTAG recovery support into the M2 Porter TPL. This allows the
TPL to be loaded over JTAG, initialize the system, wait for the
JTAG debugger to load U-Boot image into RAM and then resume and
start U-Boot from RAM.
The procedure is as follows:
1) Load u-boot-tpl.bin to 0xe6300000
2) Write magic number 0x1337c0de to 0xe6300020
TPL checks for this particular magic and starts JTAG recovery
if this number is present. This is not present by default.
3) Start U-Boot TPL from 0xe6300000
4) Wait for a message from TPL on UART indicating JTAG boot:
"JTAG boot detected!"
5) Halt the system in JTAG debugger
6) Load U-Boot image (u-boot.img) to 0x4fffffc0
7) Write magic number 0xb33fc0de to 0xe6300024
TPL checks for this particular magic to verify that the U-Boot
image was loaded into DRAM by the JTAG debugger.
8) Resume the system in JTAG debugger
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due
to the Gen2 BootROM restriction. The TPL is running from MERAM and
is capable of performing the initial initialization of PFC, Clock,
GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up
the DDR DRAM access. The TPL is capable of loading the next stage,
U-Boot, from either SPI NOR or UART as a fallback. If either does
provide a valid U-Boot uImage, the system stops, which allows the
operator to load U-Boot ie. via JTAG and start it manually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all
configurations using it to Kconfig.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
