Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
unnecessary config.mk file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch adds support for Samsung s5pc210 universal board
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* add CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR
* do not update gd->bd in dram_init() because bd is unavailable then
* move CONFIG_SYS_TEXT_BASE from config.mk to a320evb.h
* remove config.mk
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Support for DM6467 was incomplete and the build failed
as well. Patches were sent to the list but have not been
added. This enhances the DM6467 support.
Some more patches will need to be sent to bring
it in line with what is available in internal TI
trees
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Added support for MMC/SD cards for Davinci. This feature is enabled by
CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC
options. This is tested on DM355 and DM365 EVMs with both the available mmc
controllers.
Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The patch adds suupport for the Freescale's mx35pdk board
(known as well as mx35_3stack).
The board boots from the NOR flash. Following devices
are supported:
- two ethernet devices (FEC and SMC911x on debug board)
- I2C
- PMIC (MC13892) via I2C interface
- UART
- NOR flash (64MB)
- NAND flash (2GB)
- basic access to mc9sdz60 registers via I2C interface
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch adds helper funtions for basic access to the registers
of the MC9sdz60 chip (multifunctional device with RTC and CAN) via
I2C interface.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch adds basic support for the Freescale's i.MX35
(arm1136 based) processor.
The patch adds also a prototype for the initialization
of the FEC(ethernet controller) to netdev.h to avoid
warnings.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Supported:
MMC
IDE
PMIC
SPI flash
LEDs
I can boot the kernel supplied by freescale/genesi with this from MMC card
and/or PATA disk.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro
Signed-off-by: Jason Liu <r64343@freescale.com>
The early bootup information is not print out due to
the UART pin iomux not set up correctly before board_init
Add the board_early_init_f function and enable the
CONFIG_BOARD_EARLY_INIT_F. Move the UART pin setting
from board_init to board_early_init_f function.
This patch also move the FEC pin iomux setup to the
board_early_init_f.
Signed-off-by: Jason Liu <r64343@freescale.com>
Mpq101 is a RapidIO development board in AMC form factor, featuring MPC8548
processor, 512MB of hardwired DDR2 RAM, 128MB of hardwired NAND flash
memory, real time clock and additional serial EEPROM on i2c bus (enabled).
USB controller is available, but not presently enabled.
Additional board information is available at:
http://www.mc.com/products/boards/ensemble_mpq101_rapidio_powerquicc_iii.aspx
Environment is configured to precede the actual u-boot image so that it's
located at the beginning of flash erase block (made necessary by the recent
changes to the embedded environment handling). This is achieved by means of
custom ld script.
Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix the bits for ngpixis to reset to alternative bank. Originally the mask
was 0xE0, which left it possible to reset to bank 3 if DIP switch is set to
boot from bank 1. Changing to 0xF0 gurantees to reset to bank 2.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
u-boot cannot be compiled after disabling CONFIG_PCI.
Place PCI related codes under #ifdef CONFIG_PCI
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
ECC can be turned on/off by hwconfig without recompiling. So enable it
by default.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add new headers that capture common defines for a given SoC/processor
rather than duplicating that information in board config.h and random
other places.
Eventually this should be handled by Kconfig & defconfigs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
There are several users of the hwconfig APIs (8xxx DDR) before we have
the environment properly setup. This causes issues because of the
numerous ways the environment might be accessed because of the
non-volatile memory it might be stored in. Additionally the access
might be so early that memory isn't even properly setup for us.
Towards resolving these issues we provide versions of all the hwconfig
APIs that can be passed in a buffer to parse and leave it to the caller
to determine how to allocate and populate the buffer.
We use the _f naming convention for these new APIs even though they are
perfectly useable after relocation and the environment being ready.
We also now warn if the non-f APIs are called before the environment is
ready to allow users to address the issues.
Finally, we convert the 8xxx DDR code to utilize the new APIs to
hopefully address the issue once and for all. We have the 8xxx DDR code
create a buffer on the stack and populate it via getenv_f().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Rather than defining it config.mk we can set it in config.h and remove
config.mk from several boards that don't need it.
We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for
config.h to set.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Crc7 is used to compute mmc spi command packet checksum.
Copy from linux-2.6 lib/crc7.c include/linux/crc7.h
commit ad241528c4919505afccb022acbab3eeb0db4d80
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
difference to previous board version:
- M29W128GH flash from Numonyx
- SDRAM ISSI IS45S16800 (Option A2 105°C)
- rev5 uses RTC RV-3029-C2
- update cs0 and cs1 baseaddr and length
depending on the detected flash size.
- added Werner Pfister <Pfister_Werner@intercontrol.de>
as maintainer for the digsy board variants
- As the M29W128GH needs a special flash_cmd_reset()
document that in the new file doc/README.cfi.
- move "#endif /* CONFIG_CMD_IDE */" to the right place
- remove LOWBOOT config option for digsy_mtc and digsy_mtc_rev5
boards
- change doc/README.cfi as Stefan Roese suggested
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
cc: Wolfgang Denk <hs@denx.de>
cc: Stefan Roese <sr@denx.de>
cc: Werner Pfister <Pfister_Werner@intercontrol.de>
cc: Detlev Zundel <dzu@denx.de>
The MPC852 based mgsuvd and kmsupx4 boards from keymile
were initially ported but later on not developed further. So
the respective files were removed to avoid unneeded merging
and maintenance.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher<hs@denx.de>
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus
monitor timeout. Set timeout to maximum to avoid.
Based on a patch from Lan Chunhe <b25806@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption. Disable the feature to workaround the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we
should also allow the kernel image to be up to 16M decompressed.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.
We disable all ECC error checking on SDHC.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host
controller capabilities register (HOSTCAPBLT) are incorrect. The default
of these bits should be zero instead of one.
Clear these bits out when we read HOSTCAPBLT.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Do not issue a manual asynchronous CMD12. Instead, use a (software)
synchronous CMD12 or AUTOCMD12 to abort data transfer.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P2020 has 2 SRIO ports and they are useable on the P2020 DS board.
Enable them using the common SRIO init code.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
controllers for SRIO.
We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.
We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.
Introduced the following standard defines for board config.h:
CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available
(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)
[ These mimic what we have for PCI and PCIe controllers ]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Remove duplicated code in MPC8610HPCD board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in P1_P2_RDB boards and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8569MDS board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8568MDS board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8548CDS board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8641HPCN board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8544DS board and utilize the common
fsl_pcie_init_ctrl(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3
specially to setup the additional memory map region and we utilize a
single LAW to cover the controller.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in P2020DS board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove duplicated code in MPC8572DS board and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus. Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.
Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
back by searching for it means we can do things like dynamically allocate
them or not have to expose the static structures to all users.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it and were
undefining it.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
of the initdram() functions were identical, with 2 common differences:
1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others. I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.
2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document. It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled. This seems bad.
The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some new platform's esdhc pins don't share with other function.
The eSDHC shouldn't be disabled, even if "esdhc" isn't defined
in hwconfig env variable.
Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem.
Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting
from NAND.
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Neither of these parts should have the erratum this is meant to
work around. Delete it.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PM854/PM856 boards are no longer maintained and thus we are removing
support for them.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
This patch sync with David's patch on Linux for handling nand_scan_ident.
commit 5e81e88a4c140586d9212999cea683bcd66a15c6
Author: David Woodhouse <David.Woodhouse@intel.com>
Date: Fri Feb 26 18:32:56 2010 +0000
mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
This patch add addition suffix to nand write to give the uboot
the power to directly burn the yaffs image to nand.
Signed-off-by: Lei Wen <leiwen@marvell.com>
PCI is not used at all on lwmon5. So lets remove it. It saves space and
reduces boot time a bit (approx. 50ms).
Signed-off-by: Stefan Roese <sr@denx.de>
Patch "Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value"
(sha1: 25ddd1fb0a)
introduce GENERATED_GBL_DATA_SIZE which is sizeof aligned gd_t
(currently 0x40).
Microblaze configs used 0x40(128) because this place also contained
board info structure which lies on the top of ram.
U-Boot is placed to the top of the ram (for example 0xd7ffffff)
and bd structure was moved out of ram.
This patch is fixing this scheme with GENERATED_BD_INFO_SIZE
which swap global data and board info structures.
For example:
Current: gd 0xd7ffffc0, bd 0xd8000000
Fixed: gd 0xd7ffffc0, bd 0xd7ffff90
Signed-off-by: Michal Simek <monstr@monstr.eu>
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We have config_defaults.h which are random configuration settings that
everyone gets by default. We also have config_cmd_default.h which is a
recommended list of defaults but boards have to opt into. Now we have
config_cmd_defaults.h which is a list of defaults that everyone gets
and has to actively opt out of.
For now, we populate it with the bootm command which previously was
unable to be disabled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch supports T-SH7706LSR board.
This is constitution almost same as shmin (T-SH7706LAN).
Therefore, most functions work by a change of the setting of config.
http://web.kyoto-inet.or.jp/people/takagaki/T-SH7706/T-SH7706LSR.htm
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds support for the SHMIN SH7706 board(T-SH7706LAN).
The CPU of this board is SH7706.
There are SDRAM of 32M byte, Flash memory of 512K byte, Serial,
10Base Ether and MMC.
http://web.kyoto-inet.or.jp/people/takagaki/T-SH7706/T-SH7706.htm
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
After booting the u-boot, and first using some SD card (such as Sandisk 2G SD
card), because the field 'clock' of struct mmc is zero, this will cause
the read transfer is always active and SDHC DATA line is always active,
therefore, driver can't handle the next command.
Therefore, we use mmc_set_clock to setup both the data structure and HW
to the initial clock speed of 400000Hz.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add reginfo as a default command for p1022ds boards
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The non-reentrant versions of the hashtable functions operate on a single
shared hashtable. So if two different people try using these funcs for
two different purposes, they'll cause problems for the other.
Avoid this by converting all existing hashtable consumers over to the
reentrant versions and then punting the non-reentrant ones.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.
This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch includes the following changes for the lwmon5 board support:
- Enable cache in SDRAM
- Use common EHCI driver instead of the PPC4xx specific OHCI driver
This can be done since only high-speed devices are connected.
- Remove cached TLB entry again after ECC setup
- Use correct define for cache enabling
(CONFIG_4xx_DCACHE instead of CONFIG_SYS_ENABLE_SDRAM_CACHE)
- Enable FIT image support
Signed-off-by: Stefan Roese <sr@denx.de>
The t3corp board has an Xilinx DS617 flash chip connected to the
onboard FPGA. This patch adds support for these chips. Board
specific flash accessor functions are needed, since the chips
can only be read correctly in 16bit mode.
Additionally the FPGA chip-selects are configured for device-paced
transfers (ready is enabled).
Signed-off-by: Stefan Roese <sr@denx.de>
Aspenite is a Development Board for ASPEN/ARMADA168(88AP168) with
* Processor upto 1.2GHz
* Parallel 1Gb x8 DDR2-1066 MHz
* 16 Mb x16 NOR, 4Gb x8 SLC NAND, footprint for SPI NOR
* Footprints for eMMC/eSD NAND & MMC x8 card
* 4-in-1 card reader (xD, MMC/SD/MS Pro), CF True IDE socket
* SEAF memory board, subset of PISMO2
With Peripherals:
* 4.3” WVGA 24-bit LCD
* Audio codecs (AC97 & I2S), TSI
* VGA camera
* Video in via 3 RCA jacks, and HDMI type C out
* Marvell 88W8688 802.11bg/BT module
* GPS RF IC
* Dual analog mics & speakers, headset jack, LED, ambient light sensor
* USB2.0 HS host (A), OTG (micro AB)
* FE PHY, PCIE Mini Card slot
* GPIO, GPIO expander with DIP switches for easier selection UART serial over USB, CIR
This patch adds basic board support with DRAM and UART functionality
The patch is tested for boot from DRAM using XDB
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds commonly used macros for ARMADA100 based
baords, Also some code reshuffled and updated for typos and comments
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers
For ex. ARMADA100.
These registers are programmed to expose the specific functionality
associated with respective SoC Pins
This driver provides configuration APIs,
using them, configuration need to be done in board specific code
for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality
int board_early_init_f(void)
{
u32 mfp_cfg[] = {
/* Console on UART1 */
MFP107_UART1_RXD,
MFP108_UART1_TXD,
MFP_EOC /*End of configureation*/
};
/* configure MFP's */
mfp_config(mfp_cfg);
return 0;
}
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
- serial console in PSC1
- 128MiB DRAM
- 32MiB Flash
- FEC Ethernet
- 2 I2C busses
- FPGA on CS3
- IDE
- VGA SMI501
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The following commit:
commit 46e91674fb
Author: Peter Tyser <ptyser@xes-inc.com>
Date: Tue Nov 3 17:52:07 2009 -0600
tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.
Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.
This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card. We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.
Additionally, we clean up the code a bit to remove an unnecessary second
define.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
CC: Ruslan N. Araslanov <byaaka@yandex.ru>
Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add battery charging support twl6030 driver.
Add support for battery voltage and current measurements.
Add command to get battery status and start/stop battery charging from USB.
Signed-off-by: Balaji T K <balajitk@ti.com>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The DM6446 does not build due to the ARM
relocation patch.
Also the board does not build in the NOR
mode. Changed default to NAND to ensure
no build failure.
While at it removed CONFIG_CMD_KGDB
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This file has been synced (copy) from Linux source code.
This commit was based on kernel 2.6.32.
It updates gigabit related phy registers and basic definitions.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Recent cleanup actions resulted in a number of config.mk files that
contained only LDSCRIPT definitions. Move these into th respective
board config files and remove the now empty config.mk files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Peter De Schrijver <p2@mind.be>
Acked-by: Detlev Zundel < dzu@denx.de>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher<hs@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
This board uses the OMAP-L138 SOM stacked on a
custom baseboard. It supports SPI Flash, Ethernet
with RMII.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch is a port of the work by Sudhakar Rajeshekhara in commit
ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The patch adds basic board support for TI's OMAP-L138 based
Hawkboard. This board is pretty similar to the da850 EVM. Support for
nand and network access is added in this version.
The following bootup procedure is used.
At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand
controllers and copies the second stage bootloader(nand_spl) to
RAM. The secondary bootloader then copies u-boot from a predefined
location in the nand flash to the RAM, and passes control to the
u-boot image.
Three config options are supported
* hawkboard_config - Used to create the u-boot.bin. Tftp the
u-boot.bin image to the RAM from u-boot, and flash to the nand flash
at address 0xe0000.
* hawkboard_nand_config - Used to generate the secondary
bootloader(nand_spl) image. This creates an elf file u-boot-spl
under nand_spl/. Create an AIS signed image using this file, and
flash it to the nand flash at address 0x20000. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The patch was already posted to the arago project,
but not yet to mainline. It allows to save environment into
the spi flash. Tested on LogiPD tmdxl138.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundev <dzu@denx.de>
CC: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc
bss values in arm920t/at91/timer driver.
The usage of bss values in driver before initialisation of bss is
forbidden. In that special case some data in .rel.dyn gets corrupted by
the arm920t/at91/timer driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch also removes now unnecessary config.mk in board directory and
make usage of new features in boards.cfg.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Adds support for the EMK TOP9000 CPU Module which is
based on ATMELs ARM926EJS AT91SAM9XE SoC.
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
CONFIG_FSL_DIU_LOGO_BMP has been removed while refactoring
MPC8610 and MPC5121 DIU code, so remove it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
We intended to use the PIC TFRR register however we where missing adding
in the PIC register base offset from IMMR when we defined
_POST_WORD_ADDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some systems need to relocate the env_addr pointer early because the
location it points to will get invalidated before env_relocate is
called. One example is on systems that might use a L2 or L3 cache
in SRAM mode and initialize that cache from SRAM mode back to being
a cache in cpu_init_r.
We set this on the 85xx boards that have support for NAND, SPI, or
SDHC/MMC boot support as they use a secondary cache in SRAM mode and
need the env_addr pointer relocated since we change from SRAM to normal
cache mode in cpu_init_r.
Also removed CONFIG_SYS_SPL as its not used anywhere.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Changed the CS4 and CS5 addresses on Local Bus for matching the PMC0
and PMC1 addresses.
Signed-off-by: Stefan Popa <Stefan.Popa@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Without CONFIG_CMD_NET support CONFIG_CMD_NFS leads
to linking error, so disable CONFIG_CMD_NFS option.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Also change the CONFIG_SYS_TEXT_BASE to 0x80008000, required
with relocation support. This is the load address for primary
boot loader (x-loader).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The macro CONFIG_SYS_GBL_DATA_SIZE has been replaced
with GENERATED_GBL_DATA_SIZE.
Also define macros: CONFIG_SYS_INIT_RAM_ADDR and
CONFIG_SYS_INIT_RAM_SIZE.
Based on changes for omap3_beagle in the commit:
31bfcf1c57
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Seems that if CONFIG_CMD_NET is undefined we should also
undefine CONFIG_CMD_NFS, otherwise build fails with various
undefined reference like:
net/libnet.o: In function `rpc_req':
u-boot/net/nfs.c:193: undefined reference to `NetEthHdrSize'
u-boot/net/nfs.c:202: undefined reference to `NetSendUDPPacket'
u-boot/net/nfs.c:203: undefined reference to `NetTxPacket'
u-boot/net/nfs.c:203: undefined reference to `NetServerEther'
This patch adds the undef CONFIG_CMD_NFS in configuration file.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch fixes the SDB4430 build after commit 6d8962e814
by explicitly disabling CMD_NFS.
>From the commit message for "Switch from archive libraries to partial linking":
This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Two configuration include files had duplicate CONFIG_DOS_PARTITION
definitions with the same value.
This patch does not effect anything, just trims unnecessary text.
Signed-off-by: Semih Hazar <semih.hazar@indefia.com>
Rather than add runtime overhead of installing completion handlers, do it
statically at build time. This requires a new build time helper macro to
declare a command and the completion handler at the same time. Then we
convert the env related funcs over to this.
This gives an opportunity to also unify the U_BOOT_CMD macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The duplication of the do_reset prototype has gotten out of hand,
and they're not all in sync. Unify them all in command.h.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The duplication of the do_bootm prototype has gotten out of hand,
and they're pretty much all outdated (wrt constness). Unify them
all in command.h.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The recent command clean up to constify the argv option to command funcs
missed the command_t type itself. This is probably because there are no
build time warnings from it because no one is actually using this thing.
So just punt it rather than fix it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch fixes the issue by defining and using
CONFIG_SYS_INIT_RAM_SIZE and CONFIG_SYS_INIT_RAM_ADDR.
This patch adopts the
commit 31bfcf1c57
from Steve Sakoman and Sandeep Paulraj on Devkit8000.
Signed-off-by: Thomas Weber <weber@corscience.de>
This commit adapts 4xx boards for partial linking with --gc-sections.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: David Updegraff <dave@cray.com>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Larry Johnson <lrj@acm.org>
Cc: Peter De Schrijver <p2@mind.be>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Daniel Poirot <dan.poirot@windriver.com>
Acked-by: Stefan Roese <sr@denx.de>
Apply the same fix for 83xx as was done for 85xx in commit
96196a1f75.
Without this, NAND SPLs are built with the text base intended for the main
image, resulting in a broken, very large u-boot-nand.bin.
The block of defines for NAND boot is moved closer to where
CONFIG_SYS_TEXT_BASE is defined. We can't directly use
CONFIG_SYS_NAND_U_BOOT_DST in the definition of CONFIG_SYS_TEXT_BASE because
autoconf.mk will include the literal text "CONFIG_SYS_NAND_U_BOOT_DST",
but at least keep them close and point out that they're supposed to be
the same.
Signed-off-by: Scott Wood <scottwood@freescale.com>
These boards use an embedded environment, which is not supported by the
generic arch/powerpc/cpu/ppc4xx/u-boot.lds script.
The breakage was introduced by commit 2cd95a2 "ppc4xx: Remove board
specific linker scripts from most PPC4xx boards"
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Andrea Marson <andrea.marson@dave-tech.it>
Acked-by: Stefan Roese <sr@denx.de>
So far, only the BAB7xx board would call the initialise_w83c553f()
function for the WINBOND 83C553 chip, even though some other boards
(HIDDEN_DRAGON, Sandpoint8240, Sandpoint8245) enabled it in their
board configuration. These boards were also missing other config
settings needed for that, which resulted in build errors like this:
drivers/pci/libpci.o:(.got2+0x84): undefined reference to `ide_bus_offset'
Switch arch/powerpc/lib/board.c to call initialise_w83c553f() not on a
per-board base, but when a WINBOND_83C553 in enabled in a
configuration (like BAB7xx), and disable it in the boards that had
this set so far.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Yusdi Santoso <yusdi_santoso@adaptec.com>
Cc: Jim Thompson <jim@musenki.com>
Acked-by: Stefan Roese <sr@denx.de>
The barco board appears to be unmaintained since it was added about 5
years ago. The environment location has probably never been correct.
Drop it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Marc Leeman <marc.leeman@barco.com>
Acked-by: Stefan Roese <sr@denx.de>
The ERIC board appears to be unmaintained for more than 9 years. The
environment location has probably never been correct, and has been
definitely broken since for at least a year. Drop it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Swen Anderson <sand@peppercon.de>
Acked-by: Stefan Roese <sr@denx.de>
start with sheevaplug configuration
add modifications by Alexander Holler <holler@ahsoftware.de>
change RAM definitions to one bank (128 MB)
change ident string and prompt
define MTD partitions and default environment variables
add support for LEDs
Signed-off-by: Eric Cooper <ecc@cmu.edu>
