Commit Graph

40589 Commits

Author SHA1 Message Date
Jacob Chen
6b388f0bed rockchip: configs: correct partitions 'boot' size
It should be 112M, to make rootfs start at 0x40000

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
c420ef67e5 rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)
This adds support for the Asus Chromebook Flip, an RK3288-based clamshell
device which can flip into 'tablet' mode. The device tree file comes from
Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
e70408c069 rockchip: Add support for veyron-mickey (Chromebit)
This adds support for the Asus Chromebit, and RK3288-based device designed
to plug directly into an HDMI monitor. The device tree file comes from
Linux v4.8.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
095e6c1f2d rockchip: video: Avoid using u8 in the HDMI driver
It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine.
It can only bloat the code by forcing the compiler to mask the value.
Change it to uint.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
20b13e8d7e rockchip: veyron: Adjust ARM clock after relocation
Update board_init() to increase the ARM clock to the maximum speed on
veyron boards. This makes quite a large difference in performance. With
this change, speed goes from about 750 DMIPS to 2720 DMIPs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
3a8a42d955 rockchip: clk: Support setting ACLK
Add basic support for setting the ARM clock, since this allows us to run
at maximum speed in U-Boot. Currently only a single speed is supported
(1.8GHz).

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
aede3acc9c rockchip: Move jerry SDRAM settings into its own .dts file
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
38ffcb679b rockchip: veyron: Add a note about the SDRAM voltage
Add a comment to indicate that we are not supporting the PWM regulator
yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
5e9b15034b rockchip: Rename jerry files to veyron
At present we have a single rk3288-based Chromebook: chromebook_jerry. But
all such Chromebooks can use the same binary with only device-tree
differences. The family name is 'veyron', so rename the files accordingly.

Also update the device-tree filename since this currently differs from
Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
57db8c6d87 rockchip: Move jerry to use of-platdata
Adjust jerry to use of-platdata like other rk3288 boards. This reduces the
SPL size enough that it boots again.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
987a404aa1 rockchip: video: Check for device in use
Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.

This allows us to remove the device-tree change that disables vopb on
jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
1b68283b64 video: Track whether a display is in use
Mark a display as in use when display_enable() is called. This can avoid
a display being used by multiple video-output devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
7981394e55 video: Use cache-alignment in video_sync()
Sometimes the frame buffer is not a multiple of the cache line size.
Adjust the cache-flushing code to avoid cache warnings/errors in this
case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
28f9885875 spi: Add a debug() on bind failure
This is an uncommon error but we may as well have a debug() message when
it happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
b42524744d rockchip: spi: Honour the deactivation delay
This is not currently implemented. Add support for this so that the Chrome
OS EC can be used on jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
6e019c4f28 rockchip: spi: Add support for of-platdata
Allow this driver to be used with of-platdata on rk3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
71634f289d spi: Add of-platdata support to SPI and SPI flash
Some boards may want to use these subsystems with of-platdata in SPL. Add
support for this by avoiding any device tree access in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
d844efec47 stdio: Correct numbering logic in stdio_probe_device()
The current code assumes that the devices are ordered corresponding to
their alias value. But (for example) video1 can come before video0 in the
device tree.

Correct this, by always looking for device 0 first. After that we can fall
back to finding the first available device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
ab29a34a59 stdio: Correct code style nits
Fix a few code style nits in stdio_get_by_name().

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
c8816d1442 rockchip: Allow jerry to use of-platdata
This board always boots from SPI, so update the code to support that with
of-platdata. The boot source is not currently available with of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
9ed6826060 rockchip: video: Correct VOP clock selection
This code incorrectly uses the oscillator. It should use the clock
selected in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
2016-11-25 17:59:30 -07:00
Simon Glass
e4ab3d712a rockchip: video: Correct HDMI data source selection
This code currently always selects the second source. It only worked
because both sources are set up.

With the change to only init video devices that are present in the stdout
environment variable, this fails. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Kever Yang
ae804cf4af dts: arm: rk3036: add usb vbus node
add fix regulator node for usb vbus power control.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Kever Yang
c70956052a config: rk3036: enable fix regulator
usb host vbus power is using gpio fix regulator, enable it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
1e352124b9 config: rk3036: enable configs for USB HOST
rk3036 using dwc2 usb controller, need enable relate configs for it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
0dffb28107 config: evb-rk3399: enable PWM_ROCKCHIP
PWM_ROCKCHIP need to enable for PWM regulator, this config
is missing during rebase and new patch set in previous submission.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
8aea45a745 evb-rk3399: deduced the dram node size when space reserved
The size dram node need to be deduced by the same amount of reserved space.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Andreas Färber
ef904bf28e arm: rockchip: Fix typo in ROCKCHIP_RK3288 help
UART,s -> UARTs, to avoid this spreading via copy&paste.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Andreas Färber
cf78150f41 arm: dts: Fix Rockchip sort order
Sort rk3036 before rk3288.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Keerthy
5483456e91 power: regulator: Add limits checking while setting current
Currently the specific set ops functions are directly
called without any check for min/max current limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixed checking of current limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:26 -07:00
Keerthy
eaadcf38dd power: regulator: Add limits checking while setting voltage
Currently the specific set ops functions are directly
called without any check for voltage limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed checking of voltate limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:58:09 -07:00
Keerthy
2f5d532f3b power: regulator: Introduce regulator_set_value_force function
In case we want to force a particular value on a regulator
irrespective of the min/max constraints for testing purposes
one can call regulator_set_value_force function.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-25 10:00:04 -07:00
Jagan Teki
543bd27353 MAINTAINERS: SUNXI: Update maintainership
Add Jagan and Maxime as Maintainers for SUNXI

Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-22 09:07:26 -05:00
Tom Rini
081abb1309 Merge branch 'master' of git://git.denx.de/u-boot-spi 2016-11-22 07:57:23 -05:00
Radu Bacrau
1f3232d2a1 sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G
This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.

Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-22 11:58:59 +05:30
Tom Rini
ca39bd8ce1 am57xx: Remove unused variable warnings
Starting with the changes to fix USB host on am57xx/am43xx we stopped
using usb_otg_ss1/related stuff and but we hadn't been enabling the
relevant options to cause the warnings until just recently.

Fixes: 55efadde7e (ARM: AM57xx: AM43xx: Fix USB host)
Fixes: a48d687c57 (configs: am57xx: Enable download gadget)
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:58 -05:00
Yann E. MORIN
c294873179 fastboot: simplify the Kconfig logic
Currently, the fastboot item in menuconfig is a comment followed by a
boolean option withan empty prompt, followed by a menu:

        *** FASTBOOT ***
    [*]
          Fastboot support  --->

This is not "nice-looking" at all...

Change the logic to make the boolean option a "menuconfig" rather than a
mere "config", so that all dependent options gets groupped under a menu.
The layout is now:

        *** FASTBOOT ***
    [*] Fastboot support  --->

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:33 -05:00
Adam Ford
12262340d5 ARM: OMAP3_LOGIC: Update MTD Partition Table
The previous partition table did not support a separate device tree
and the kernel size was limited to 4MB.  This update shows the
location of the device tree (labeled as spl-os) for those who
want to use Falcon Mode or use U-Boot to store the Flattened
Device Tree (FDT) to NAND without appending it to the kernel.

This also grows the kernel to 6MB since 4MB was becomming tight

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:33 -05:00
Adam Ford
d5584e4361 ARM: OMAP3_LOGIC: Remove FIT Support
Commit ("2cd1ff84037a: OMAP3_LOGIC: Setup defconfig to enable
SPL and NAND booting") accidentally enabled FIT support.

This patch removes the FIT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:32 -05:00
Adam Ford
b15e7c1727 ARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode
The memory map defined in commit ("49c7303f0e52: OMAP3: Enable SPL
on omap3_logic) was used by a copy-paste of another board without
fully understanding how the map works in Falcon mode.  This patch
undoes the customization and uses the default SPL Memory Map
for OMAP3.

When building the uImage, set LOADADDR=0x82000000 and Falcon
mode should properly load.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:32 -05:00
Cédric Schieli
ade243a211 rpi: passthrough of the firmware provided FDT blob
Raspberry firmware used to pass a FDT blob at a fixed address (0x100),
but this is not true anymore. The address now depends on both the
memory size and the blob size [1].

If one wants to passthrough this FDT blob to the kernel, the most
reliable way is to save its address from the r2/x0 register in the
U-Boot entry point and expose it in a environment variable for
further processing.

This patch just does this:
- save the provided address in the global variable fw_dtb_pointer
- expose it in ${fdt_addr} if it points to a a valid FDT blob

There are many different ways to use it. One can, for example, use
the following script which will extract from the tree the command
line built by the firmware, then hand over the blob to a previously
loaded kernel:

fdt addr ${fdt_addr}
fdt get value bootargs /chosen bootargs
bootz ${kernel_addr_r} - ${fdt_addr}

Alternatively, users relying on sysboot/pxe can simply omit any FDT
statement in their extlinux.conf file, U-Boot will automagically pick
${fdt_addr} and pass it to the kernel.

[1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-11-21 14:07:32 -05:00
Cédric Schieli
3e10fcde3f arm: add save_boot_params for ARM1176
Implement a hook to allow boards to save boot-time CPU state for later
use. When U-Boot is chain-loaded by another bootloader, CPU registers may
contain useful information such as system configuration information. This
feature mirrors the equivalent ARMv7 feature.

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-11-21 14:07:31 -05:00
Andrew Duda
83dd98e012 image: Combine image_sig_algo with image_sign_info
Remove the need to explicitly add SHA/RSA pairings. Invalid SHA/RSA
pairings will still fail on verify operations when the hash length is
longer than the key length.

Follow the same naming scheme "checksum,crytpo" without explicitly
defining the string.

Indirectly adds support for "sha1,rsa4096" signing/verification.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:31 -05:00
Andrew Duda
0c1d74fda7 image: Add crypto_algo struct for RSA info
Cut down on the repetition of algorithm information by defining separate
checksum and crypto structs. image_sig_algos are now simply pairs of
unique checksum and crypto algos.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:31 -05:00
Andrew Duda
da29f2991d rsa: Verify RSA padding programatically
Padding verification was done against static SHA/RSA pair arrays which
take up a lot of static memory, are mostly 0xff, and cannot be reused
for additional SHA/RSA pairings. The padding can be easily computed
according to PKCS#1v2.1 as:

  EM = 0x00 || 0x01 || PS || 0x00 || T

where PS is (emLen - tLen - 3) octets of 0xff and T is DER encoding
of the hash.

Store DER prefix in checksum_algo and create rsa_verify_padding
function to handle verification of a message for any SHA/RSA pairing.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:30 -05:00
Andrew Duda
5300a4f933 rsa: cosmetic: rename pad_len to key_len
checksum_algo's pad_len field isn't actually used to store the length of
the padding but the total length of the RSA key (msg_len + pad_len)

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-21 14:07:30 -05:00
Tom Rini
187f9dc3f7 TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2
With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:29 -05:00
Tom Rini
983e37007d arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories.  All refernces to the former locations are updated to
the current locations.  For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:29 -05:00
Tom Rini
272686eb75 arm: Introduce ARCH_OMAP2
To start consolidating various TI-related code, introduce the ARCH_OMAP2
symbol.  While we have removed omap2-specific boards some time ago,
matching up with the kernel naming here will help overall.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-21 14:07:28 -05:00
Stefan Brüns
b18491520f fs-test.sh: Update expected results
After the latest changes, ext4 no longer has any fails.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2016-11-21 14:07:28 -05:00