Commit Graph

67734 Commits

Author SHA1 Message Date
Ruben Di Battista
67e62c7468 drivers: usb: Fix config indentation
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:

```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
2020-08-27 11:20:33 -04:00
Tom Rini
f87c80ade3 Prepare v2020.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:30:22 -04:00
Tom Rini
d86bf9124f configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-26 17:26:24 -04:00
Tom Rini
7a1a01c602 For 2020.10
-----------
 
 - mx6: SOCs user selectable
        Fix for imx6q_logic
        Some DM conversion
 - mx7: introduce secondary boot device
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010
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Merge tag 'u-boot-imx-20200825' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2020.10
-----------

- mx6: SOCs user selectable
       Fix for imx6q_logic
       Some DM conversion
- mx7: introduce secondary boot device

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-25 23:12:43 -04:00
Tom Rini
9f9ecd3e4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25 13:38:29 -04:00
Tom Rini
ec54217ddc Merge tag 'i2c-bugfixes-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2020.10
- fix some issues with octeon_i2c driver on ARM Octeon TX2
- fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
2020-08-25 08:19:41 -04:00
Tom Rini
e49a9d4ddb Merge tag 'u-boot-rockchip-20200820' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3399 evb sdcard support
- Fix for SPL_LED support
2020-08-25 08:19:14 -04:00
Tom Rini
078656186f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
2020-08-25 08:18:50 -04:00
Tom Rini
8ee3a24fdc Merge branch '2020-08-24-misc-improvements'
- Squashfs compression support
- Coverity fixes
- XEN guest updates
- Finish previous MediaTek updates
- Arm Total Compute platform support
2020-08-25 08:12:05 -04:00
Stefan Roese
6944937f9c x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LEN
With the upcoming increase of the malloc area in U-Boot
("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU
x86 test fails:

U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000)

alloc space exhausted
Error binding driver 'cpu_qemu': -12
Some drivers failed to bind
alloc space exhausted
initcall sequence fff6a760 failed at call fff13b3d (err=-19)

This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is
already used on qemu-x86_64_defconfig.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 11:37:57 +02:00
Grygorii Tertychnyi
acbc1d86f1 imx8m: config: convert to bootm_size
Restrict the memory range available for image processing in the
"bootm" to 256 MiB so the kernel can access it and FDT or initrd are
not overwritten on ARM64.

Signed-off-by: Grygorii Tertychnyi <grygorii.tertychnyi@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-25 10:26:38 +02:00
Adam Ford
74d8f9d562 ARM: imx6q_logic: Fix broken booting by moving fdt_addr_r address
The loading address is too close to the kernel address, so newer kernels
may overlap memory space, so loading the device tree may corrupt zImage.

This patch moves the fdt_addr_r to 0x14000000 which is also consistent
with guidance that the kernel be allocated 32MB.  This places it
in the same place as the ramdisk, so this patch moves the ramdisk address
512KB after the fdt.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:31 +02:00
Fabio Estevam
821a987fec pico-imx6: Remove unneeded CONFIG_DM_MDIO
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-08-25 10:26:24 +02:00
Tom Rini
f27ffe4177 arm: mx6: Make all i.MX6 SoCs user-selectable
We have a number of platforms that are a combination of a carrier board
and System-on-Module (SoM) that in turn allows for the board to have
different SoCs on it.  In some cases, this is handled via board-specific
Kconfig options.  In other cases we make use of
CONFIG_SYS_EXTRA_OPTIONS.  This latter case however can lead to invalid
configurations as we will not in turn get options that in Kconfig are
selected by or depend on that setting.

To resolve this, make the SoC option a choice in Kconfig and make boards
depend on what they can support.  This change opens us up for further
clean-ups in the cases where a single CONFIG_TARGET_xxx can support
different SoCs and today they do not, or do not cleanly do so.

Reported-by: Matt Porter <mporter@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Soeren Moch <smoch@web.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ian Ray <ian.ray@ge.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Cc: Simone CIANNI <simone.cianni@bticino.it>
Cc: Adam Ford <aford173@gmail.com>
Cc: Marcin Niestroj <m.niestroj@grinn-global.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Parthiban Nallathambi <parthiban@linumiz.com>
Cc: Marek Vasut <marex@denx.de>
Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Niel Fourie <lusus@denx.de>
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Silvio Fricke <open-source@softing.de>
Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-08-25 10:26:14 +02:00
Suneel Garapati
0a668f6d38 arm: octeontx2: Add support for OcteonTX2 SoC platforms
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
03c2288070 arm: octeontx: Add support for OcteonTX SoC platforms
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
af6ba90048 watchdog: Add reset support for OcteonTX / TX2
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
708598997d mmc: Add MMC controller driver for OcteonTX / TX2
Adds support for MMC controllers found on OcteonTX or
OcteonTX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
638d705a54 pci: Add PCI controller driver for OcteonTX / TX2
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
3f6f0cd8fd ata: ahci: Add BAR index quirk for Cavium PCI SATA device
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
04cd0a0fa0 arm: octeontx2: Add headers for OcteonTX2
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
387d321add arm: octeontx: Add headers for OcteonTX
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
c2f45b6588 arm: include/asm/io.h: Add 64bit clrbits and setbits helpers
Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
f0c369284d pci: pci-uclass: Check validity of ofnode
Add check if the referenced ofnode is valid.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
a3fac3f395 pci: pci-uclass: Add support for Alternate-RoutingID capability
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
51eeae91c5 pci: pci-uclass: Add VF BAR map support for Enhanced Allocation
Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
b8852dcfcb pci: pci-uclass: Add support for Single-Root I/O Virtualization
SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function

If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
636cc1773a pci: pci-uclass: Add support for Enhanced Allocation in Bridges
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Trommel, Kees (Contractor)
660606091f Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.

Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com>
Cc:  Heiko Schocher <hs@denx.de>
2020-08-25 06:25:42 +02:00
Stefan Roese
af03bde0fa i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 support
This patch fixes a few issues noticed, when testing this new driver on
ARM Octeon TX2 again. Here the details:

- Remove "common.h" header inclusion
- Use correct THP define on Octeon TX2
- Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish
  both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi"
  compatible and add a check to the Octeon TX2 specific
  "cavium,thunderx-i2c" so that the correct driver data is selected.
- Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE()
  as its not needed for the PCI based probing on Octeon TX2

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25 06:21:23 +02:00
Suneel Garapati
bc30140d20 pci: pci-uclass: Make DT subnode parse optional
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Suneel Garapati
b3699a13a6 pci: pci-uclass: Fix incorrect argument in map_physmem
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
e002474158 pci: pci-uclass: Dynamically allocate the PCI regions
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
65f8c7edd8 ARM: renesas: Drop unnecessary function ft_board_setup()
Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Stefan Roese
3b7cd265b8 pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
68f81b8575 dm: core: Add API to read PCI bus-range property
Add dev_read_pci_bus_range() to read bus-range property values

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Suneel Garapati
1db7ee464f fdtdec: Add API to read pci bus-range property
Add fdtdec_get_pci_bus_range to read bus-range property
values.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Heinrich Schuchardt
c92b50a44b cmd: provide command sbi
Provide a command to display information about the SBI implementation.

The output might look like:

=> sbi
SBI 0.2
OpenSBI
Extensions:
  sbi_set_timer
  sbi_console_putchar
  sbi_console_getchar
  sbi_clear_ipi
  sbi_send_ipi
  sbi_remote_fence_i
  sbi_remote_sfence_vma
  sbi_remote_sfence_vma_asid
  sbi_shutdown
  SBI Base Functionality
  Timer Extension
  IPI Extension
  RFENCE Extension
  Hart State Management Extension

The command can be used to construct a unit test checking that the
communication with the SEE is working.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Tested-by:  Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
2020-08-25 09:34:47 +08:00
Heinrich Schuchardt
27cef4e4a3 configs: defconfig for Sipeed Maix in S-mode
Provide a defconfig that can be used to build U-Boot for the Maix boards
running upon OpenSBI.

Update the documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-08-25 09:33:54 +08:00
Heinrich Schuchardt
092f15aee5 riscv: fix building with CONFIG_SPL_SMP=n
Building with CONFIG_SPL_SMP=n results in:

arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
   33 |  int ret;
      |      ^~~

Define the variable ret as __maybe_unused.

Fixes: 191636e448 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL")
Fixes: 8c59f2023c ("riscv: add SPL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:45 +08:00
Heinrich Schuchardt
183f1e2712 clk: kendryte/pll.h: do not redefine nop()
The kendryte PLL code uses nop as barrier. The macro is not defined for
the sandbox on x86 but is defined on RISC-V.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-25 09:33:35 +08:00
Bin Meng
3ab2601052 ram: sifive: Fix compiler warnings for 32-bit
priv->info.size is of type 'size_t' but the length modifier is l.
Fix this by casting priv->info.size. Note 'z' cannot be used as
the modifier as SPL does not support that.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:16 +08:00
Bin Meng
52dc7ae749 riscv: fu540: Use correct API to get L2 cache controller base address
At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:16 +08:00
Tom Rini
3c0cec035e Pull request for UEFI sub-system for efi-2020-10-rc3 (3)
The following bug fixes are contained in this pull-request:
 
 * ResetSystem() should no hang if not implemented.
 * Device paths in Bootxxxx variables should be verified.
 * Use ':' as separator for command setenv -e -i instead of ','.
 * Correct comments for functions.
 * Update UEFI documentation.
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Merge tag 'efi-2020-10-rc3-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc3 (3)

The following bug fixes are contained in this pull-request:

* ResetSystem() should no hang if not implemented.
* Device paths in Bootxxxx variables should be verified.
* Use ':' as separator for command setenv -e -i instead of ','.
* Correct comments for functions.
* Update UEFI documentation.
2020-08-24 17:28:18 -04:00
Anastasiia Lukianenko
3337b29144 xen: Code style conformity
Cleaning up the following:

ERROR: do not use assignment in if condition
#281: FILE: drivers/xen/pvblock.c:260:
+       if ((err = xenbus_switch_state(XBT_NIL, nodename,
CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err"
#52: FILE: drivers/xen/pvblock.c:298:
+       if (err != NULL) {
ERROR: do not use assignment in if condition
#176: FILE: drivers/xen/gnttab.c:103:
+               if ((flags = nflags) & (GTF_reading | GTF_writing)) {
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
#329: FILE: include/xen/gnttab.h:1:
+/*
WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead
#330: FILE: include/xen/gnttab.h:2:
+ * SPDX-License-Identifier: GPL-2.0
ERROR: do not use assignment in if condition
#630: FILE: lib/sscanf.c:558:
+                               if ((n = inr) < width) {

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
d226b3cd25 board: xen: Remove unnecessary CONFIG_INITRD_TAG and CONFIG_CMDLINE_TAG
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
32eac63af3 board: xen: Remove CONFIG_CMD_RUN define and clean xenguest_arm64_defconfig
CONFIG_CMD_RUN is set on by default in Kconfig.
Create xenguest_arm64_defconfig by using savedefconfig to avoid unnecessary
options.

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
607274f7f6 MAINTAINERS: Add maintainers to XEN section
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Anastasiia Lukianenko
4da1365d5c board: xen: Remove unnecessary CONFIG_BOARD_EARLY_INIT_F define and board_early_init_f function
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-24 14:11:31 -04:00