Commit Graph

33102 Commits

Author SHA1 Message Date
Tom Rini
5ec0003b19 Prepare v2015.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 19:59:38 -04:00
Simon Glass
75918afa64 powerpc: Drop old non-generic-board code
This code is no-longer used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-19 17:06:20 -04:00
Paul Gortmaker
6a48109d0e sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARD
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:19 -04:00
Paul Gortmaker
ecdc3df611 sbc8641d: increase monitor size from 256k to 384k
Between v2015.07-rc1 and v2015.07-rc2 this board started
silent boot failure.  A bisect led to commit 6eed3786c6
("net: Move the CMD_NET config to defconfigs").  This commit
looks harmless in itself, but it did implicitly add a feature
to the image which led to this:

 u-boot$git describe 6eed3786c6
 v2015.07-rc1-412-g6eed3786c68c
              ^^^

 u-boot$ls -l ../41*/u-boot.bin
 -rwxrwxr-x 1 paul paul 261476 Oct 16 16:47 ../411/u-boot.bin
 -rwxrwxr-x 1 paul paul 266392 Oct 16 16:43 ../412/u-boot.bin
 u-boot$bc
 bc 1.06.95
 Copyright 1991-1994, 1997, 1998, 2000, 2004, 2006 Free Software Foundation, Inc.
 This is free software with ABSOLUTELY NO WARRANTY.
 For details type `warranty'.
 256*1024
 262144

i.e. we finally broke through the 256k monitor size.  Jump it
up to 384k and fix the hard coded value used in the env offset
at the same time.

We were probably flirting with the 256k size issue without
knowing it when testing on different baselines in earlier
commits, but since this is all board specific, a rebase or
reorder to put this commit 1st is of little value.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:19 -04:00
Paul Gortmaker
743d75925a sbc8641d: add basic flash setup instructions to README file
...so that I don't have to go work them out from scratch again
by peering at the manual.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:18 -04:00
Paul Gortmaker
71d5511628 sbc8641d: set proper environment sector size.
When debugging an env fail due to too small a malloc pool, it
was noted that the env write was 256k.  But the device sector
size is 1/2 that, as can be seen from "fli" output:

Bank # 1: CFI conformant flash (16 x 16)  Size: 16 MB in 131 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1888
  Erase timeout: 4096 ms, write timeout: 1 ms
  Buffer write timeout: 2 ms, buffer size: 64 bytes

  Sector Start Addresses:
  FF000000 E RO   FF020000 E RO   FF040000 E RO   FF060000 E RO   FF080000 E RO
  FF0A0000 E RO   FF0C0000 E RO   FF0E0000 E RO   FF100000 E RO   FF120000 E RO
  [...]
  FFF00000   RO   FFF20000   RO   FFF40000   RO   FFF60000   RO   FFF80000   RO
  FFFA0000   RO   FFFC0000   RO   FFFE0000 E RO   FFFE8000   RO   FFFF0000 E RO
  FFFF8000   RO
=>

The desired env sector is FFF40000->FFF60000, or 0x20000 in length,
just after the 256k u-boot image which starts @ FFF00000.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:18 -04:00
Paul Gortmaker
7229c3c70b sbc8641d: increase malloc pool size to a sane default
Currently the board fails to save its env, since the env size
is much smaller than the sector size, and the malloc fails for
the pad buffer, giving the user visible symptom of:

Unable to save the rest of sector (253952)

Allow for 1M malloc pool, the same as used on the sbc8548 board.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:17 -04:00
Paul Gortmaker
73f7550715 sbc8641d: enable command line editing
It is just too painful to use interactively without it.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19 17:06:17 -04:00
Andrej Rosano
84ca65aa4b image-fit: Fix signature checking
On signature verification failures fit_image_verify() should
exit with error.

Signed-off-by: Andrej Rosano <andrej@inversepath.com>
2015-10-19 17:06:16 -04:00
Ladislav Michl
81fd858cbe igep00x0: Use BCH8 ECC
Used NAND chips requires at least 4-bit error correction, so use BCH8
as it is what kernel uses.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
2015-10-19 17:06:16 -04:00
Liviu Dudau
2fdc9b741b vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.

Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
[trini: Always declare vexpress64_pcie_init and continue handling logic
inside the function]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 17:05:46 -04:00
Liviu Dudau
2d0cee1ca2 vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.

Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2015-10-19 17:05:28 -04:00
Fabio Estevam
2727f3bfba dfu: dfu_sf: Take the start address into account
The dfu_alt_info_spl variable allows passing a starting point
for the binary to be flashed in the SPI NOR.

For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
that we want to flash the binary starting at address 0x400.

In order to do so we need to erase the entire sector and write to
the the subsequent SPI NOR sectors taking such start address
into account for the address calculations.

Tested by succesfully writing SPL binary into 0x400 offset and
the u-boot.img at offset 64 kiB of a SPL NOR.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Use lldiv for the math]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 17:05:13 -04:00
Fabio Estevam
f4c9258213 dfu: dfu_sf: Use the erase sector size for erase operations
SPI NOR flashes need to erase the entire sector size and we cannot pass
any arbitrary length for the erase operation.

To illustrate the problem:

Copying data from PC to DFU device
Download    [=========================] 100%       478208 bytes
Download done.
state(7) = dfuMANIFEST, status(0) = No error condition is present
state(10) = dfuERROR, status(14) = Something went wrong, but the
device does not know what it was
Done!

In this case, the binary has 478208 bytes and the M25P32 SPI NOR
has an erase sector of 64kB.

478208  = 7 entire sectors of 64kiB + 19456 bytes.

Erasing the first seven 64 kB sectors works fine, but when trying
to erase the remainding 19456 causes problem and the board hangs.

Fix the issue by always erasing with the erase sector size.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2015-10-19 13:47:06 -04:00
Tom Rini
d718ff70ee doc/README.scrapyard: Add more entries
- Add deletions from August 30 2015.
- A few from Sept 12, one from Oct 2nd.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 13:32:09 -04:00
Tom Rini
04d6f1420f Revert "arm: Remove inetspace_v2_cmc board"
Upon further review when populating README.scrapyard, inetspace_v2_cmc
is a variant on netspace_v2 and not just an orphan config.

This reverts commit 653600a715.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 12:27:10 -04:00
Tom Rini
7003e4cf76 Merge branch 'master' of git://git.denx.de/u-boot-arm 2015-10-19 11:30:38 -04:00
Tom Rini
ef1e5710b3 Revert "arm: Remove d2net_v2 defconfig file"
Upon further review when populating README.scrapyard, d2net_v2 is a
variant on net2big_v2 and not just an orphan config.  To help in the
future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed
a little consolidation anyhow.

This reverts commit 1363740e79.

Cc: Simon Guinot <simon.guinot@sequanux.org>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 11:26:49 -04:00
Tom Rini
461f592649 doc/README.scrapyard: Populate recent removals
Add in the commit IDs / dates for boards removed on Sept 2nd.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19 11:07:24 -04:00
Lubomir Rintel
79ad5cef15 ARM: rpi: add another revision of Raspberry Pi A+
Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1,
(C) Raspberry Pi 2014". A standard A+ board, much like the one with
version 0x12, didn't notice any differencies.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
2015-10-19 08:12:25 +02:00
Eric Cooper
d1a2f32fca ARM: dockstar: move start of environment area
The default dockstar configuration for U-Boot currently causes it to
overrun the environment area, so that a "saveenv" command bricks the
device.  This patch moves the environment to a higher address to avoid
that.

Signed-off-by: Eric Cooper <ecc@cmu.edu>
2015-10-19 07:28:54 +02:00
Lokesh Vutla
8626cb8021 ARM: k2e/l: Apply WA for selecting PA clock source
On keystone2 Lamarr and Edison platforms, the PA clocksource
mux in PLL REG1, can be changed only after enabling its clock
domain.
So selecting the output of PASS PLL as input to PA only after
enabling the clockdomain.
This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>"
and based on the previous work done by "Hao Zhang <hzhang@ti.com>"

Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code")
Reported-by: Vitaly Andrianov <vitalya@ti.com>
Tested-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-17 20:16:13 -04:00
Tom Rini
b9f06b360d arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possible
There are various toolchain issues that cause us to produce invalid
binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass
this flag in.

Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-17 08:04:11 -04:00
Tom Rini
ac6a53219a Merge git://git.denx.de/u-boot-socfpga 2015-10-16 20:21:04 -04:00
Dinh Nguyen
3790a8c662 arm: dts: socfpga: add "u-boot,dm-pre-reloc" to socfpga_cyclone5_socdk dts
We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in
order for the SPL to use SD/MMC.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-17 01:47:31 +02:00
Dinh Nguyen
8d8e13e129 arm: socfpga: enable data/inst prefetch and shared override in the L2
Update the L2 AUX CTRL settings for the SoCFPGA.

Enabling D and I prefetch bits helps improve SDRAM performance on the
platform.

Also, we need to enable bit 22 of the L2. By not having bit 22 set in the
PL310 Auxiliary Control register (shared attribute override enable) has the
side effect of transforming Normal Shared Non-cacheable reads into Cacheable
no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-17 01:47:31 +02:00
Anthony Felice
4b8cdd484c vf610twr: Fix typo in DRAM init
This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-16 07:21:09 -04:00
Tom Rini
a7e2c6f6bb Merge branch 'master' of git://git.denx.de/u-boot-samsung 2015-10-16 07:19:47 -04:00
Alison Wang
53fd4b8c22 arm: mmu: Add missing volatile for reading SCTLR register
Add 'volatile' qualifier to the asm statement in get_cr()
so that the statement is not optimized out by the compiler.

(http://comments.gmane.org/gmane.linux.linaro.toolchain/5163)

Without the 'volatile', get_cr() returns a wrong value which
prevents enabling the MMU  and later causes a PCIE VA access
failure.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
2015-10-16 07:55:51 +02:00
Tom Rini
1275456d31 Merge branch 'master' of git://git.denx.de/u-boot-arm 2015-10-15 17:45:39 -04:00
Fabio Estevam
aaf87f03ad pci: pcie_imx: Fix hang on mx6qp
PCI driver currently hangs on mx6qp.

Toggle the reset bit with the appropriate timings to fix the issue.

Based on the FSL kernel driver implementation.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-10-15 09:05:13 -04:00
Thierry Reding
b1964c72bd armv8/gic: Fix GIC v2 initialization
Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable
interrupts to the primary CPU. This fixes issues seen after booting a
Linux kernel from U-Boot.

Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15 14:47:03 +02:00
Thierry Reding
ad3d6e88a1 armv8/mmu: Set bits marked RES1 in TCR
For EL3 and EL2, the documentation says that bits 31 and 23 are reserved
but should be written as 1.

For EL1, only bit 23 is not reserved, so only write bit 31 as 1.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15 14:46:43 +02:00
Tom Rini
cb4c833b74 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-10-15 08:43:38 -04:00
Masahiro Yamada
c57a9a6350 ARM: uniphier: fix address mapping in README.uniphier
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-15 08:42:30 -04:00
Thierry Reding
55aa0bed98 armv8/mmu: Clean up TCR programming
Use the inner shareable attribute for memory, which makes more sense
considering that this code is called when caches are being enabled.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15 14:41:20 +02:00
Stefan Agner
cf04ad3219 arm: vf610twr: improve memory layout
Currently, the device tree relocation is disabled, likely to
keep some DDR3 RAM at the end for Cortex-M4 firmwares. This
can be archived using bootm_size, which limits the image
processing range of the boot commands.

Move the device tree standard load address to a higher address
which aligns better with what we are doing on other boards.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-10-15 11:22:07 +02:00
Fabio Estevam
d45fd018c8 colibri_vf: Fix bstlen field
Commit 3f353cecc ("vf610: refactor DDRMC code") changed the original
bstlen field from 3 to 0.

Restore the original value for proper behaviour.

Based on the patch from Anthony Felice <tony.felice@timesys.com>
for the vf610twr board.

Reported-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-15 11:16:17 +02:00
Stefan Agner
e24bb2b732 mtd: nand: vf610_nfc: resync with upstream Linux version
This resyncs the driver changes with the Linux version of the
driver. The driver received some feedback in the LKML and got
recently acceppted, the latest version can be found here:
https://lkml.org/lkml/2015/9/2/678

Notable changes are:
- On ECC error, reread OOB and count bit flips in OOB too.
  If flipped bits are below threshold, also return an empty
  OOB buffer.
- Return the amount of bit flips in vf610_nfc_read_page.
- Use endianness aware vf610_nfc_read to read ECC status.
- Do not enable IDLE IRQ (since we do not operate with an
  interrupt service routine).
- Use type safe struct for buffer variants (vf610_nfc_alt_buf).
- Renamed variables in struct vf610_nfc (column and page_sz)
  to reflect better what they really representing.

The U-Boot version currently does not support RAW NAND write
when using the HW ECC engine.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Tested-by: Stefan Agner <stefan@agner.ch>
Acked-by: Scott Wood <scottwood@freescale.com>
2015-10-15 11:10:44 +02:00
Albert ARIBAUD
13a3972585 Merge remote-tracking branch 'u-boot/master' 2015-10-14 10:46:36 +02:00
Tom Rini
297faccca2 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-10-13 08:37:38 -04:00
Tobias Jakobi
2308ea7c6f exynos: more debug and cleanup in do_sdhci_init()
Add more debug printfs in do_sdhci_init() for calls
that can potentially fail.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
995a54cc12 exynos: be more verbose in process_nodes()
In case sdhci_get_config() or do_sdhci_init() fail, show
the error code that was returned.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
6a9fbb6e20 exynos: Fix passing of errors in exynos_mmc_init()
exynos_mmc_init() always returns zero, so for the caller
it looks like it never fails.

Correct this by returning the error code of process_nodes().
For process_nodes() do something similar and return early
when do_sdhci_init() fails.

v2: Only fail in process_nodes() if we fail on all
    available nodes.

Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Tobias Jakobi
1a9d1731f9 exynos: Properly zero initialize host in s5p_sdhci_init()
This makes sure that setting the host_caps in s5p_sdhci_core_init()
doesn't operate on potentially uninitialized memory.

Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:28 +09:00
Guillaume GARDET
8e34a74d69 odroid: Add boot script (boot.scr) support
Add boot script (boot.scr) support. If no boot script are
found, it boots as usual.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:11 +09:00
Guillaume GARDET
4ed50807e2 odroid: replace 'fatload' with 'load' to be able to use EXT* partitions
Replace 'fatload' command by 'load', to be able to use EXT*
partitions while keeping FAT partition compatibility.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-10-13 20:22:11 +09:00
Fabio Estevam
f861f51c46 ls102xa: Fix reset hang
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
issuing a 'reset' command causes the system to hang.

Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.

This means that the watchdog on LS1021 has been working by accident as
it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
revelead the endianness problem on LS102x.

In order to fix the reset hang, introduce a reset_cpu() implementation that
is specific for ls102x, which accesses the watchdog WCR register in big-endian
format. All that is required to reset LS102x is to clear the SRS bit.

This approach is a temporary workaround to avoid a regression for LS102x
in the 2015.10 release. The proper fix is to make the watchdog driver
endian-aware, so that it can work for i.MX, Vybrid and LS102x.

Reported-by: Sinan Akman <sinan@writeme.com>
Tested-by: Sinan Akman <sinan@writeme.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-12 12:56:32 -04:00
Fabio Estevam
f532727d16 imx_watchdog: Add a header file for watchdog registers
Create fsl_wdog.h to store the watchdog registers and bit fields.

This can be useful when accesses to the watchdog block are made from other
parts, such as arch/arm/ cpu code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-12 12:56:26 -04:00
Tom Rini
87a9595709 Prepare v2015.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-12 11:14:27 -04:00