Commit Graph

56 Commits

Author SHA1 Message Date
Tom Rini
caebff09ef First set of u-boot-atmel features for 2021.01 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAl960JkcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyDaWCACYjvloDzXQaYaauWwR
 whFwgkUAQ8yjadj/12We/X2b7HGisNFNE80e/V4MU8RrJDFZmohZdLWMfRKez29X
 d+BG+OzVXxHWozny7ZQ2g1yYJbgCI7sVUeemQjUBZJ6aKPneQlVfwyfT2l88wOVK
 yQMqS+ZyVogihR9/NHCOlJHog+6OOoBmc16w1tymM6QcO8ZsYeA66ed8SLnjDb3N
 Rg2Ll2RR/lHuD/Fpxt1aUhybXFKSIOr4Qopo5X0hw5B3ibkp6JXGRE2wIwQYw6CA
 q+sKTg37CSzylipkQ5EOGdLcXD7r3KIGkSbUMb8wvt6dROarnIuQ+zJeF3sr+l2H
 hSoU
 =vHqZ
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.01 cycle:

This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update.  The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-05 10:54:27 -04:00
Claudiu Beznea
01c35f269f cpu: at91: add driver for CPU
Add basic CPU driver use to retrieve information about CPU itself.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-10-05 10:45:16 +03:00
Sean Anderson
7616e3687e timer: Add a test for timer_timebase_fallback
To test this function, sandbox CPU must set cpu_platdata.timebase_freq on
bind. It also needs to expose a method to set the current cpu. I also make
some most members of cpu_sandbox_ops static.

On the timer side, the device tree property
sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe
falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-30 08:54:45 +08:00
Simon Glass
961420fa5f cpu: Convert the methods to use a const udevice *
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25 14:46:57 -06:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Simon Glass
f07e58b878 cpu: Convert the methods to use a const udevice *
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20 11:37:47 -06:00
Sagar Shrikant Kadam
add0dc1f7d riscv: cpu: check and append L1 cache to cpu features
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sagar Shrikant Kadam
b6b233ddb7 riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit
The conditional check to read "mmu-type" from the device tree
is not rightly handled due to which the cpu feature doesn't include
CPU_FEAT_MMU even if it's corresponding entry is present in the device
tree.

The initialization of cpu features is now taken care in cpu-uclass
driver, so no need to zero out cpu_freq in riscv_cpu driver and can be
removed.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sagar Shrikant Kadam
969251a5a4 uclass: cpu: fix to display proper CPU features
The cmd "cpu detail" fetches uninitialized cpu feature information
and thus displays wrong / inconsitent details as below.
For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
        Microcode version 0x0
        Device ID 0x0

The L1 cache or MMU entry seen above is also displayed inconsistently.
So initialize cpu information to zero into cpu-uclass itself so that
similar issues can be avoided for other CPU drivers.

We now see correct features as:
=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-01 15:01:27 +08:00
Sean Anderson
627718626b riscv: Enable cpu clock if it is present
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Sean Anderson
ab24017a19 riscv: Try to get cpu frequency from a "clocks" node if it exists
Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-01 15:01:22 +08:00
Anatolij Gustschin
74e8fb03bd cpu: imx8: use intended cpu-thermal device when getting temp value
This fixes getting DT alert and critical pdata values in imx_scu_thermal
driver. On i.MX8QXP using not initialized alert pdata value resulted in
boot hang and endless loop outputting:
CPU Temperature (47200C) has beyond alert (0C), close to critical (0C) waiting...

While at it, preset CPU type values once to avoid multiple calls
of device_is_compatible() for same property.

Fixes: 3ee6ea443e ("cpu: imx_cpu: Print the CPU temperature for iMX8QM A72")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-22 13:27:46 +02:00
Anatolij Gustschin
69365540cf cpu: imx8: fix type and rate detection
CPU type and rate detection is broken, for A35 cpu we get A53:
...
sc_pm_get_clock_rate: resource:0 clk:2: res:3
Could not read CPU frequency: -22
CPU:   NXP i.MX8QXP RevB A53 at 0 MHz at 47C

Fixes: 55bc96f3b6 ("cpu: imx8: fix get core name and rate")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-22 13:26:33 +02:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Frank Li
8142a97d54 cpu: imx8: show RevC instead of Rev? at boot log
Add REVC informaiton.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Ye Li
3ee6ea443e cpu: imx_cpu: Print the CPU temperature for iMX8QM A72
iMX8QM registers two thermal devices for CPUs, get the temperature
from "cpu-thermal1" device for A72

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Peng Fan
55bc96f3b6 cpu: imx8: fix get core name and rate
When current cpu is A53, using is_cortex_a53 could not detect A72
information, so check cpu device compatible property to get
the correct information.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Peng Fan
177f9996d3 cpu: imx8: support a72 as boot cpu
Support booting i.MX8QM with A72 as boot cpu

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Peng Fan
adb3bd7654 cpu: imx8: reimplement get cpu count
Return 4 is not correct on i.MX8DX/DXL/8QM and etc. we need to count
available cpu node with device_type "cpu".

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Peng Fan
b1e894ff50 cpu: sandbox: support is_current
Support querying whether U-Boot is running on current cpu

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Peng Fan
4c809aee50 uclass: cpu: Add new API to get udevice for current CPU
When running on SoC with multiple clusters, the boot CPU may
not be fixed, saying booting from cluster A or cluster B.
Add a API that can return the udevice for current boot CPU.
Cpu driver needs to implement is_current_cpu interface for this
feature, otherwise the API only returns the first udevice in
cpu uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2020-05-03 15:45:49 +02:00
Simon Glass
600f584d81 cpu: Support querying the address width
Different CPUs may support different address widths, meaning the amount of
memory they can address. Add a property for this to the cpu_info struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
2189d5f1e8 Move strtomhz() to vsprintf.h
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.

Use the vsprintf.h include file explicitly where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:09 -05:00
Peng Fan
43c5087385 imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Bin Meng
4dfea4b5cd riscv: cpu: Skip unavailable hart in the get_count() op
We should not count in hart that is marked as not available in the
device tree in riscv_cpu_get_count().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-09-03 09:29:43 +08:00
Atish Patra
007056f495 cpu: Bind timer driver for boot hart
Currently, timer driver is bound only for hart0.

There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.

The timer driver should be bound for boot hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27 09:12:33 +08:00
Bin Meng
833508c05c cpu: Add a RISC-V CPU driver
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Bin Meng
6fe8abcce7 cpu: mpc83xx: Remove unnecessary characters in the description string
The description string should not contain unnecessary characters,
like the ending '\n' or the leading 'CPU:'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Patrick Delaunay
22929e1266 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with
commit 83d290c56f ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-28 09:26:39 -04:00
Mario Six
19fbdca47b cpu: Add MPC83xx CPU driver
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
fa44b53398 test: Add tests for CPU uclass
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
57370de377 cpu: Add cpu_probe_all method
Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Philippe Reynes
341032d3f1 bcm6838: add initial support
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:38:17 +02:00
Philippe Reynes
cef1f0c7a4 cpu: bmips: fix probe to get the address
In the device tree, the address for cpu is located in
the node "cpus", not in the cpu node (for exemple cpu@0).
So when probing cpu, the cpu address must be read in the
cpu parent.

The commit "cpu: bmips: convert to use live dt"
(sha1: c444afbbef)
change this behaviour and read the address in the
cpu node when probing cpu.

We fix this by reading the address in the cpu parent.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-07-11 14:23:55 +02:00
Álvaro Fernández Rojas
c444afbbef cpu: bmips: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Álvaro Fernández Rojas
1b075ba016 dm: cpu: bmips: add BCM6362 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
70d30d8684 dm: cpu: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
8c8ef2e825 dm: cpu: bmips: add BCM6368 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Simon Glass
45a26867e8 dm: core: Update device_bind_driver_to_node() to use ofnode
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:08 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Álvaro Fernández Rojas
05fc9e686a dm: cpu: bmips: add BCM6338 support
BCM6338 has a fixed CPU frequency of 240 MHz.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
603058f4ab dm: cpu: bmips: add BCM3380 support
As far as I know BCM3380 has a fixed CPU frequency since I couldn't find its
PLL registers in any documentation.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
33a9995908 dm: cpu: bmips: add BCM6348 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
6ffc18cd04 dm: cpu: bmips: rename cpu_desc specific functions
Use a generic name for cpu_desc functions instead of using a specific SoC one.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
10e320483f cpu: add CPU driver for Broadcom MIPS SoCs
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 16:16:09 +02:00