Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), SPL does not need pin-mux settings for
the System Bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit 26b09c022a ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), the System Bus is initialized by
board_init(). The show_board_info() is called from board_init_f()
by default, so the revision register of the Micro Support Card may
not be accessed at this point. Show its revision after the System
Bus is initialized.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.
Fixes: c995f3a3c5 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There is no microcode update available for SoCs used on Intel MID
platforms.
Use conditional to bypass it.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel MID platform boards have special treatment, such as boot parameter
setting.
Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Mobile Internet Device (MID) platforms have special treatment in
some cases, such as CPU enumeration or boot parameters configuration.
Besides that several drivers are specifically developed for the IP
blocks found on Intel MID platforms. Those drivers will be dependent to
this option.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example,
Intel Edison.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Depending upon the compiler used, IRQ entries could vary in sizes. With
GCC 5.x, the code generator will use short jumps for some IRQ entries
but near jumps for others. For example, GCC 5.4.0 generates the
following:
$ objdump -d interrupt.o
<snip>
00000207 <irq_18>:
207: 6a 12 push $0x12
209: eb 85 jmp 190 <irq_common_entry>
0000020b <irq_19>:
20b: 6a 13 push $0x13
20d: eb 81 jmp 190 <irq_common_entry>
0000020f <irq_20>:
20f: 6a 14 push $0x14
211: e9 7a ff ff ff jmp 190 <irq_common_entry>
00000216 <irq_21>:
216: 6a 15 push $0x15
218: e9 73 ff ff ff jmp 190 <irq_common_entry>
This causes a problem in cpu_init_interrupts(), because the IDT setup
assumed same sizes for all IRQ entries. GCC 4.x always generated 32-bit
jumps, so this previously was not a problem.
The fix is to force 32-bit near jumps for all entries within the
inline assembly. This works for GCC 5.x, and 4.x was already using
that form of jumping.
Signed-off-by: Jason Tang <tang@jtang.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When using early malloc the allocated memory can overflow into the SRAM
scratch space, move NON_SECURE_SRAM_IMG_END down a bit to allow more
dynamic allocation at the expense of a slightly smaller maximum image
size.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig.
Due to SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION being moved to
Kconfig the board defconfigs for db-88f6820-gp_defconfig
kc1_defconfig and sniper_defconfig need to be updated.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
the socfpga bootrom supports mmc booting from either a raw image
starting at 0x0, or from a partition of type 0xa2. This patch
adds support for locating the boot image in the first type 0xa2
partition found.
Assigned a partition number of -1 will cause a search for a
partition of type CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
and use it to find the u-boot image
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
When the node 'reserved-memory' is not defined in the DT we fail
to add needed properties. We also fail to move 'offs' to point to
the new node. Fix these here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
not completed. Finish this work by the tool.
During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH"
than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will
make the code more readable. Besides, negative meaning symbols do
not fit in obj-$(CONFIG_...) style Makefiles.
This commit was created as follows:
[1] Edit "default n" to "default y" in the config entry in
common/Kconfig.
[2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH"
[3] Rename the instances in defconfigs by the following:
find . -path './configs/*_defconfig' | xargs sed -i \
-e '/CONFIG_SYS_NO_FLASH=y/d' \
-e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/'
[4] Change the conditionals by the following:
find . -name '*.[ch]' | xargs sed -i \
-e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \
-e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \
-e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \
-e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/'
[5] Modify the following manually
- Rename the rest of instances
- Remove the description from README
- Create the new Kconfig entry in drivers/mtd/Kconfig
- Remove the old Kconfig entry from common/Kconfig
- Remove the garbage comments from include/configs/*.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Miniarm is the internal project code. Now it is officially named Tinker board.
So rename it.
Signed-off-by: Eddie Cai <eddie.cai@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
miniarm board use lpddr3
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Added 'rockchip:' prefix to subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I84c3679dab2dbd8d01c1ebfd22220946d07c03cd
To use driver-model adds the pmic node for max8997.
This is used as kernel device-tree in Linux.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_CMD_ZIP is not defined by any board. I am moving
CONFIG_CMD_UNZIP to defconfig files except UniPhier SoC family.
I am the maintainer of UniPhier platform, so I know "select CMD_UNZIP"
is better for this platform.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
There are two typos in the comment "invalide i-cache is enabled".
We can fix it by
invalide -> invalidate
is -> if
Or, if we want to match the comment to the code, we can say
"skip invalidating i-cache if disabled".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.
Script for the same (and hand modified for Makefile and config
files):
for i in arch/arm/dts/k2*
do
b=`basename $i`;
git mv $i arch/arm/dts/keystone-$b;
sed -i -e "s/$b/keystone-$b/g" arch/arm/dts/*[si]
done
This is similar to linux kernel commit 5edafc29829bc ("ARM: dts: k2*: Rename
the k2* files to keystone-k2* files")
[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
AArch64 has a zero register (xzr). Use it instead of x2.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
If there is a '.' in a compatible string, then dtoc will produce a struct
with a name containing a '.'. This won't work, so replace it with '_'.
Also add a suitable test to the sandbox device tree to catch this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The mpuclk register in the Altera group of the clock manager
divides the mpu_clk that is generated from the C0 output of the main
pll.
Without this patch, the default value of the register is 1, so the mpuclk
will always get divided by 2 if the correct value is not set. For example,
on the Arria5 socdk board, the MPU clock is only 525 MHz, and it should be
1.05 GHz.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add support for programmable MAC impedance configuration and
fix typo in DT impedance parameters names.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This option is useful not only for development, but for the platforms
where U-Boot is run from custom ROM bootloader. For example, Intel
Edison is that board.
Make this option visible that platforms can select it if needed.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
QEMU does not need ucode and this is indicated in u-boot.dtsi
for U-Boot proper. Now add the same for SPL.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the correct pre-relocation tag so that the required device tree
nodes are present in the SPL device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch_cpu_init() and print_cpuinfo() should be only available in SPL
build.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch_cpu_init_dm() might not be implemented by every platform.
Implement a weak version for SPL.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DECLARE_GLOBAL_DATA_PTR is missing which causes 64-bit build error.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update config.mk settings to support both 32-bit and 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add the correct pre-relocation tag so that the required device tree nodes
are present in the SPL device tree.
On x86 it doesn't make a lot of sense to have a separate SPL device tree.
Since everything is in the same ROM we might as well just use the main
device tree in both SPL and U-Boot proper. But we haven't implemented that,
so this is a good first step.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When building for 64-bit we need to put an SPL binary into the image. Update
the binman image description to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't have the code for this yet. Add a dummy version for now, so that
EFI builds correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
