Commit Graph

830 Commits

Author SHA1 Message Date
Anup Patel
e2842496ac drivers: serial: Add SiFive UART driver
This patch adds SiFive UART driver. The driver is 100% DM driver
and it determines input clock using clk framework.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18 09:56:54 +08:00
Patrice Chotard
f828fa4d82 serial: serial_stm32: Add reset support
In some cases, UART is configured by early boot stage.
To be sure of the initial state of UART and to avoid
spurious chars on console, reset the serial block before
configuring it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-15 11:49:56 -05:00
Sekhar Nori
d50d6817b5 spl: fix build failure with !CONFIG_SPL_PCI_SUPPORT
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:

lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'

This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.

Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.

To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).

Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12 12:14:23 -05:00
Felix Brack
5eca073ae6 serial: omap: Add code for early debugging
This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-07 08:13:49 -05:00
Álvaro Fernández Rojas
e9e8d80d8c serial: bcm6858: remove driver and switch to bcm6345
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Álvaro Fernández Rojas
09ace9161b serial: bcm6345: switch to raw I/O functions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Andy Shevchenko
50bf7d03c2 serial: ns16550: Provide ->getinfo() implementation
New callback will supply necessary information, for example,
to ACPI SPCR table.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 07:23:15 -07:00
Andy Shevchenko
4e7207791c serial: ns16550: Read reg-io-width from device tree
Cache the value of the reg-io-width property for the future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
d5bb4f862b dm: serial: Introduce ->getinfo() callback
New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:31 -07:00
Andy Shevchenko
ac7f5db9dc dm: serial: Add ->getconfig() callback
In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Simon Goldschmidt
1a67969a99 Revert "serial: ns16550: fix debug uart putc called before init"
This reverts commit 6f57c34473 since it
does not seem to work at least on rk3399.

The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.

Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com
2018-12-03 21:50:47 -05:00
Christophe Leroy
42b54013a0 drivers: serial: get rid of non DM mpc8xx driver
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
bdfa11ebcf drivers: serial: migrate mpc8xx to DM
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Ryder Lee
849b11605a serial: MediaTek: add high-speed uart driver for MediaTek SoCs
Many SoCs from MediaTek have a high-speed uart. This UART is compatible
with the ns16550 in legacy mode. It has extra registers for high-speed
mode which can reach a maximum baudrate at 921600.

However this UART will no longer be compatible if it's in high-speed mode.
Some BootROM of MediaTek's SoCs will change the UART into high-speed mode
and the U-Boot must use this driver to initialize the UART.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28 23:04:53 -05:00
Simon Goldschmidt
9ad3b049ed serial: ns16550: add setconfig support
Add possibility to update the serial parity used.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-11-16 16:52:00 -05:00
Philippe Reynes
f371f91bdd serial: bcm6858: add serial support
This driver add the support of serial on bcm6858.
It's based on serial for bcm6345.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16 13:34:35 -05:00
Bin Meng
4687919684 serial: Remove DM_FLAG_PRE_RELOC flag in various drivers
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be
bound before relocation. However due to a bug in the DM core,
the flag only takes effect when devices are statically declared
via U_BOOT_DEVICE(). This bug has been fixed recently by commit
"dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in
lists_bind_fdt()", but with the fix, it has a side effect that
all existing drivers that declared DM_FLAG_PRE_RELOC flag will
be bound before relocation now. This may expose potential boot
failure on some boards due to insufficient memory during the
pre-relocation stage.

To mitigate this potential impact, the following changes are
implemented:

- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver
  only supports configuration from device tree (OF_CONTROL)
- Keep DM_FLAG_PRE_RELOC flag in the driver only if the device
  is statically declared via U_BOOT_DEVICE()
- Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for
  drivers that support both statically declared devices and
  configuration from device tree

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:28 -08:00
Simon Goldschmidt
6f57c34473 serial: ns16550: fix debug uart putc called before init
If _debug_uart_putc() is called before _debug_uart_init(), the
ns16550 debug uart driver hangs in a tight loop waiting for the
tx FIFO to get empty.

As this can happen via a printf sneaking in before the port calls
debug_uart_init(), let's rather ignore characters before the debug
uart is initialized.

This is done by reading the baudrate divisor and aborting if is zero.

Tested on socfpga_cyclone5_socrates.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:28 -08:00
Bin Meng
8d773c4ab3 dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()
Currently the comments of several APIs (eg: dm_init_and_scan()) say:

@pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
flag. If false bind all drivers.

The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt
documents the same that both device tree properties and driver flag
are supported.

However the implementation only checks these special device tree
properties without checking the driver flag at all. This updates
lists_bind_fdt() to consider both scenarios.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in http://patchwork.ozlabs.org/patch/996473/ :
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Andy Shevchenko
cdef6bb43c dm: Fix typo - missed semicolon
The commit

  484fdf5ba0 ("dm: Add support for all targets which requires MANUAL_RELOC")

introduces subtle typo, i.e. missed semicolon.

Fixes: 484fdf5ba0 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-11-09 10:44:50 -05:00
Tom Rini
cf033e04da Merged imx8 architecture, fix build for imx8 + warnings
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Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25 10:16:21 -04:00
Bernhard Messerklinger
4684fa8bdd serial: mxc: Add match string for i.mx6 quad/dual lite serial
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-10-22 18:56:17 +02:00
Peng Fan
8f5b6299bc serial: lpuart: support uclass clk api
Modify most APIs to use udevice as the first parameter, then
it will be easy to get the clk reference by using udevice pointer.
Use uclass api to get lpuart clk when CONFIG_CLK is enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:02 +02:00
Ye Li
cdc16f6182 serial: lpuart: Enable RX and TX FIFO
Enable the RX and TX FIFO in LPUART driver to avoid the input lost
during U-Boot boot up.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:02 +02:00
Peng Fan
126f884903 serial_lpuart: Update lpuart driver to support i.MX8
Add i.MX8 compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also, according to RM, the Receive FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08
(not 0x40) for i.MX8, otherwise the Receive FIFO is not disabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:02 +02:00
Simon Glass
aa0ffe8eb9 serial: Allow serial to be absent in TPL
At present this option applies to SPL, but it should be available in TPL
also, and separately. Change to using CONFIG_IS_ENABLED(), add a new
Kconfig option and fix up hang().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
4af3e9ad8a sandbox: Restore blocking I/O on exit
At present sandbox sets non-blocking I/O as soon as any input is read
from the terminal. However it does not restore the previous state on
exit. Fix this and drop the old os_read_no_block() function.

This means that we always enable blocking I/O in sandbox (if input is a
terminal) whereas previously it would only happen on the first call to
tstc() or getc(). However, the difference is likely not important.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
114b60a7e6 serial: sandbox: Allow serial output without device tree
At present sandbox assumes that device-tree control is active, but this
may not be the case in SPL or TPL. Add some conditions to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
ee4417644c sandbox: Add a debug UART
Add support for the debug UART so that sandbox provides build testing for
this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Patrice Chotard
95a077217b serial: serial_stm32: Enable uart FIFO for STM32F7xx SoCs
Since commit 7b3b74d321 ("serial: serial_stm32: Enable overrun")
on STM32F7xx based boards, the first lines of serial output are
missing during boot (we no more see the U-Boot release version,
board model and DRAM size).

By enabling the uart FIFO on STM32F7, the complete U-boot log
can be sent correctly.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-30 13:00:35 -04:00
Tom Rini
0ae8dcfef7 Patch queue for efi - 2018-09-26
A lot of goodness in this release. We're *very* close to running the
 UEFI Shell and SCT natively. The only missing piece are HII protocols.
 
   - FAT write support (needed for SCT)
   - improved FAT directory support (needed for SCT)
   - RTC support with QEMU -M virt
   - Sandbox support (run UEFI binaries in Linux - yay)
   - Proper UTF-16 support
   - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
   - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
   - Fix window size determination
   - Fix Tegra by explicitly unmapping RAM
   - Clean up handle entanglement
   - Lots of generic code cleanup
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-09-26

A lot of goodness in this release. We're *very* close to running the
UEFI Shell and SCT natively. The only missing piece are HII protocols.

  - FAT write support (needed for SCT)
  - improved FAT directory support (needed for SCT)
  - RTC support with QEMU -M virt
  - Sandbox support (run UEFI binaries in Linux - yay)
  - Proper UTF-16 support
  - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
  - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
  - Fix window size determination
  - Fix Tegra by explicitly unmapping RAM
  - Clean up handle entanglement
  - Lots of generic code cleanup

[trini: Fixup merge conflict in include/configs/qemu-arm.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-26 17:02:46 -04:00
Lokesh Vutla
c1523c65fc serial: omap: Add support for AM654 uart controller
AM654 uses a UART controller that is compatible (partially) with
existing OMAP UART, Introduce a compatible for adding support
for this controller.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-25 21:50:34 -04:00
Heinrich Schuchardt
3e603ec757 efi_loader: struct efi_simple_text_input_protocol
%s/efi_simple_input_interface/efi_simple_text_input_protocol/

We should be consistent in the naming of the EFI protocol interface
structures. The protocol is called EFI_SIMPLE_TEXT_INPUT_PROTOCOL.

%s/ExtendedVerification/extended_verification/

Use consistent naming of function parameters. Do not use CamelCase.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Lokesh Vutla
586bde93eb arm: K3: Add initial support for TI's K3 generation of SoCs
Add support for Texas Instruments' K3 Generation Processor
families.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
5d754197a7 serial: omap: Introduce DM specific omap serial
Add driver model support for OMAP_SERIAL while reusing
the functions in ns16550.c

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-10 21:19:32 -04:00
Lokesh Vutla
5f133bb7c5 serial: arm_dcc: Add DCC support for V7R based cores
DCC is supported on Cortex R series as well. Enable DCC support
for V7R.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-10 20:48:20 -04:00
Patrice Chotard
d7c09684d7 sandbox: Add serial test
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:48:12 -04:00
Patrice Chotard
fbd5c72d76 serial: stm32: Replace setparity by setconfig
Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:38 -04:00
Patrice Chotard
cbf538831d dm: serial: Replace setparity by setconfig
Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.

Adds SERIAL_GET_PARITY/BITS/STOP macros.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:38 -04:00
Patrick Delaunay
d3bb785854 serial: protect access to serial rx buffer
Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-10 20:20:34 -04:00
Heinrich Schuchardt
938b05a5d7 drivers: serial: document on_baudrate()
Add parameter description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Tom Rini
481ea2e39d mips: au1x00: Remove support for these SoCs
The only platform left for the AU1x00 SoCs was the pb1x00 platform, an
apparent clone of the dbau1x00 platform.  As pb1x00 had no listed
maintainer I am assuming that it is also orphaned.  Remove this platform
and then remove the unused SoC support.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08 13:34:27 +02:00
Joe Hershberger
82a115fdec sandbox: Don't disable ctrlc() on sandbox if in raw mode
In raw mode, handle ctrl-c as normal. This allows normal ctrl-c behavior
such as aborting a command that is timing out without completely
terminating the sandbox executable.

In [1], Simon disabled this.  His reason for it was that it interferes
with piping test scripts. Piping should be done in cooked mode, so this
change should still not interfere.

[1] commit 8969ea3e9f ("sandbox: Disable Ctrl-C")

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-26 14:08:17 -05:00
Michal Simek
6bdf0a992c serial: zynq: Use platdata for storing static data instead of priv
Explanation from Simon Glass
"Private data is created when the device is probed and freed when the
device is removed.

Platform data is created when the device is bound, and survives
probe/remove cycles.

Strictly speaking, platform data should be used to hold the decoded
device tree properties. Private data should be used for run-time
things the device needs to keep track of."

Based on description the driver needs to be switch to use platdata
instead of priv.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-19 10:49:54 +02:00
Ley Foon Tan
b051eecbda serial: ns16550: Add reset ctrl to driver
Add code to reset all reset signals as in serial DT node. A reset
property is an optional feature, so do not fail if a reset property is
not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:28:28 -04:00
Manivannan Sadhasivam
6f9347f3bc serial: Add Actions Semi OWL UART support
This commit adds Actions Semi OWL family UART support. This driver
relies on baudrate configured by primary bootloaders.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:39 -04:00
Masahiro Yamada
41bacb597e serial: uniphier: set clock rate without clock-frequency property
In Linux, the clock rate of the UART is given by the clock driver.

If you try to follow that in U-Boot, you would end up with adding
more u-boot,dm-pre-reloc properties, and also the clock driver would
be too big for SPL, which is used for UniPhier ARMv7 platform.

The current solution is to add 'clock-frequency' property to the
UART nodes, but it does not exist in the DT files in Linux.  I do
not want to let DT diverge for U-Boot.

Check the SoC compatible and set the clock rate according to it.
This will be helpful to sync DT between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:15 +09:00
Masahiro Yamada
157736a9ee serial: uniphier: rename struct uniphier_serial_private_data
Just for making it shorter.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:14 +09:00
Michal Simek
b729ed0d95 serial: zynq: Make zynq_serial_setbrg static
This function is used only inside this driver that's why should be
static.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
a673025535 serial: zynq: Initialize uart only before relocation
This issue was found when OF_LIVE was enabled that there are scrambled
chars on the console like this:
Chip ID:	zu3eg
Watchdog: Started��j�   sdhci@ff160000: 0, sdhci@ff170000: 1
In:    serial@ff010000

I found a solution for this problem exactly the same as I found later in
serial_msm fixed by:
"serial: serial_msm: initialize uart only before relocation"
(sha1: 7e5ad796bc)

What it is happening is that output TX fifo still contains chars to be
sent and _uart_zynq_serial_init() resets TX fifo even in the middle of
transfer.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00