Commit Graph

59602 Commits

Author SHA1 Message Date
Kunihiko Hayashi
4ebeb4c559 cmd: pci: Adjust display of digits for 64bit address and size
The command "pci bar" and "pci region" display the address and size in
16 characters including "0x", so the command can only display
14 hexadecimal digits if the number of digits in the address and size is
less than 14.

    ID   Base                Size                Width  Type
    ----------------------------------------------------------
     0   0x00000020000000  0x00000000100000  64     MEM   Prefetchable
     1   0xffff000080000000  0x00000000100000  64     MEM   Prefetchable

The 64-bit address and size should be displayed in 18(= 16+2) digits,
so this patch adjusts them.

Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-26 11:46:28 -04:00
Adam Ford
97605d3ca3 ARM: omap3_logic: Fix SPL boot failure when EHCI enabled
Some of the USB code is still being built into SPL even when the
SPL menu options have it explicitly disabled for SPL. Unit there is
a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
building SPL which reduces the code and lets the board boot again.

Fixes: 25e4ff45b1 ("ARM: omap3_logic: Enable OMAP EHCI support
for SOM-LV Boards")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-26 11:46:27 -04:00
Heinrich Schuchardt
e946b5d257 cmd: gpio: remove redundant assignment
The assigned value NULL is overwritten before being used. Remove the
assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-26 11:46:27 -04:00
Sudeep Holla
208bdaf2ae vexpress/aemv8a: drop CONFIG_ARMV8_SWITCH_TO_EL1
To support KVM, we need to drop at EL2 and not EL1 before we boot Linux
kernel. This causes issues on platform with VHE and secondaries booting
at EL2 via TF-A PSCI CPU_ON call.

Cc: Ryan Harkin <ryan.harkin@linaro.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-08-26 11:46:27 -04:00
Sudeep Holla
af38acbd70 ARM: vexpress_*_defconfig: replace earlyprintk with earlycon
earlyprintk no longer works on arm64 platforms. Replace it with earlycon
which works fine.

Cc: Ryan Harkin <ryan.harkin@linaro.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-26 11:46:27 -04:00
Martin Vystrčil
d7af2a8630 fat: FAT filesystem premature release of info struct.
File was found on specified location. Info about file was read,
but then immediately destroyed using 'free' call. As a result
file size was set to 0, hence fat process didn't read any data.

Premature 'free' call removed. Resources are freed right before
function return. File is read correctly.

Signed-off-by: Martin Vystrcil <martin.vystrcil@m-linux.cz>
2019-08-26 11:46:21 -04:00
Park, Aiden
bd98e6ae71 dm: scsi: Scan the actual number of ports
The scsi_scan_dev() is looping over the number of uc_plat->max_id.
The number of actual ports a AHCI controller has can be greater than
max_id. Update uc_plat->max_id to make SCSI scan all detected ports.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-26 11:46:20 -04:00
Adam Ford
5adbc0e5ca ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux
When the pinmux configuration was added, it was accidentally placed into
the omap3_pmx_wkup node  when it should have been placed into the
omap3_pmx_core.  This error was accidentally propagated to U-Boot by
me when I blindly copied the device tree from Linux.

This patch moves the i2c2_pins and i2c3_pins to the correct node
which should eliminate i2c bus errors and timeouts due to the fact
the bootloader uses the save device tree that no longer properly
assigns these pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-26 11:46:20 -04:00
Vikas Manocha
5f7adb5b1c board_f: reserve noncached space below malloc area
Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2019-08-26 11:46:20 -04:00
Nuno Gonçalves
27e0f3bcf0 arm: ti: Fix regression in distro boot for mmc
When devnum was changed to a local variable in distro_bootcmd we ran
into a problem on TI platforms (confirmed on Beaglebone) as we had been
using 'setenv devnum' there as well and it needs to match the other
usage.

Fixes: 13dd6665ed ("distro: not taint environment variables if possible")
[trini: Review other platforms, re-word commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-26 11:43:53 -04:00
Tom Rini
6f9656d726 Merge branch '2019-08-24-master-imports'
- Migrate SYS_SPI_U_BOOT_OFFS, SYS_NAND_USE_FLASH_BBT and ARCH_CPU_INIT
  to Kconfig
2019-08-26 09:37:37 -04:00
Hannes Schmelzer
1ee774d209 Convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_SPI_U_BOOT_OFFS

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
[trini: Expose this for SPL_SPI_SUNXI for now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-25 20:59:00 -04:00
Hannes Schmelzer
f8584bbe72 moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 4
the x530 board needs conversion of SPL_SPI_LOAD to Kconfig first

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
2019-08-25 20:58:59 -04:00
Hannes Schmelzer
2c24a83b04 moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 3
Exact two boards are referencing CONFIG_SYS_SPI_U_BOOT_OFFS to another
define, we replace this manually with the value for having a clean run
of moveconfig.py afterwards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-25 20:58:59 -04:00
Hannes Schmelzer
abf9e5d0f2 moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 2
some boards have common headers for several individual build-targets
where CONFIG_SYS_SPI_U_BOOT_OFFS is defined even it is not needed (only
needed if CONFIG_SPL_SPI_LOAD is defined also). Take this define here
under '#ifdef CONFIG_SPL_SPI_LOAD' for having a clean run of
moveconfig.py

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-25 20:58:59 -04:00
Hannes Schmelzer
015287919f moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 1
Some boards have coded this offset with formula or bitshifts in their
board-config. Manually convert these things into hex-values to be able
using moveconfig.py afterwards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-25 20:58:58 -04:00
Stefan Roese
c680df7e84 mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.

Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-25 20:58:37 -04:00
Adam Ford
1bf330150c Convert CONFIG_ARCH_CPU_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_CPU_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Felix Brack <fb@ltec.ch>
2019-08-25 19:32:55 -04:00
Tom Rini
bf17bcc5b1 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-25 12:03:24 -04:00
Tom Rini
50b4b80f59 Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
2019-08-24 08:33:27 -04:00
Tom Rini
3d8fab1e9e Merge branch '2019-08-23-master-imports'
- Migrate CONFIG_MX_CYCLIC, CONFIG_FSL_USDHC and CONFIG_MXS_GPIO to
  Kconfig
- Fix some SPL/TPL and ARM64 dependencies
2019-08-24 08:32:22 -04:00
Adam Ford
78f28773a5 Convert CONFIG_MX_CYCLIC to Kconfig
This converts the following to Kconfig:
   CONFIG_MX_CYCLIC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: David Lechner <david@lechnology.com>
2019-08-23 16:45:40 -04:00
Adam Ford
3f70bef1b8 Convert CONFIG_FSL_USDHC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_USDHC

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-23 16:42:38 -04:00
Adam Ford
057055660f Kconfigs: Various: Fix some SPL, TPL and ARM64 dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-23 13:59:06 -04:00
Lukasz Majewski
5484793363 kconfig: Convert CONFIG_MXS_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_MXS_GPIO

Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/571260789

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-08-23 13:59:06 -04:00
Tom Rini
b242d1b13e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk 2019-08-23 10:03:13 -04:00
Max Kellermann
cbd298b6ee evb_rk3399: revert CONFIG_SYS_MMC_ENV_DEV to 0
This was changed to 1 in commit 0717dde057, but a few months later,
commit 5f9411af37 swapped the order of eMMC and SD card by assigning
indexed aliases to `&sdhci` and `&sdmmc`.

Signed-off-by: Max Kellermann <max.kellermann@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Add signature)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:31 +08:00
Urja Rannikko
0557d46b63 disk: efi: ignore 'IGNOREME' GPT header found on cros eMMCs
Some ChromeOS devices (atleast veyron speedy) have the first 8MiB of
the eMMC write protected and equipped with a dummy 'IGNOREME' GPT
header - instead of spewing error messages about it, just silently
try the backup GPT.

Note: this does not touch the gpt cmd writing/verifying functions,
those will still complain.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:50 +08:00
Urja Rannikko
20c568cae6 disk: efi: unify code for finding a valid gpt
There were 3 copies of the same sequence, make it into a function.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:32 +08:00
Rohan Garg
fa177ff020 board: puma: Use rockchip_* helpers to setup cpuid and macaddr
We should use the shared helpers to setup the necessary parts

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:31 +08:00
Rohan Garg
015c3fbad9 rockchip: rk3399: Enable CONFIG_MISC_INIT_R for the Rock PI 4
This enables us to set a static MAC address

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:31 +08:00
Rohan Garg
0482538499 rockchip: rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

This is based off of Klaus Goger's work in 8adc9d

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:31 +08:00
Kever Yang
cb8c492f20 rockchip: rk3288: remove fennec board support
Since there is no one using this board, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
58ec0aa361 rockchip: rk3399: defconfig: remove SPL raw image support
RK3399 SPL only support FIT image for ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
861e48e8fb rockchip: rk3368: defconfig: remove SPL raw image support
RK3368 SPL only support FIT image for ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
8b221f5e06 rockchip: rk3328: defconfig: remove SPL raw image support
RK3328 SPL only support FIT image for ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
4d2c572312 rockchip: Move config SYS_MALLOC_LEN to Kconfig
Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
08bbe44424 rockchip: dts: rk3328-rock64: fix usb power supply
According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
2e91e2025c rockchip: rk3328: migrate u-boot node to -u-boot.dtsi
Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
8e5c8571fe rockchip: dts: rk3328-rock64: enable usb3 xhci controller
Rock64 has a USB3.0 port, enable the controller so that we can use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
2fcff365e0 rockchip: clk: rk3328: add clk_enable ops for HCLK_HOST0
Required to successfully probe the ehci generic driver

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
e0f907efa5 ram: rk3399: update cap and ddrconfig for each channel after init
We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Tom Rini
c399dca834 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- i2c dm model support of lx2160a, ls1088a, lx2088a, ls1028a
- icid setup for ls1028a, ls1088a
- other small fixes
2019-08-22 07:29:54 -04:00
Laurentiu Tudor
b249fcba00 armv8: ls1028a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, edma, qdma, gpu, display and sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
5c6dc6c9a9 armv8: ls1088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
aef654a2ed armv8: fsl-layerscape: make icid setup endianness aware
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
08f9bc9f43 armv8: fsl-layerscape: add base addresses for several devices
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
ef3f364a75 armv8: fsl-layerscape: add missing sec jr base address defines
Add defines for all the SEC job rings base addresses.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
71a2da3fa9 armv8: kconfig: Fix some platforms incorrect I2C clock divider
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
1748990ab2 armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.

USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources

SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.

SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.

By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30