Signed-off-by: Roger Meier <r.meier@siemens.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Since more functions are enabled, the eb_cpux9k2_ram target does not boot.
This patch changed the TEXT_BASE, that the code fits between TEXT_BASE and ram end.
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Get rid of too many ifdeffery in usb ohci driver
Add following two configuration for USB clock selecting
- CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock
- CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add usb host support for at91sam9n12ek board.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Get DMA bus width from design config register
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wandboard quad was not ported into U-boot at the time of writing the README.
Add it to the list of Wandboard variants.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This reverts commit 178b8e15ad.
Patch was merged too fast, without checking that another patch
is fixing the reported issue globally - reverted.
Signed-off--by: Stefano Babic <sbabic@denx.de>
rdaddr was missing which is a common location for loading ramdisks to.
loadaddr was higher than it needs to be, so use the same value other TI
platforms use.
Signed-off-by: Tom Rini <trini@ti.com>
The change from 0x64656465 to 0x64646464 is to remove the weak pull
enabled on DQS, nDQS lines. This pulls the differential signals in the
same direction which is not intended. So disabling the weak pulls improves
signal integrity.
On the uEVM there are 4 DDR3 devices. The VREF for 2 of the devices is powered by
the OMAP's VREF_CA_OUT pins. The VREF on the other 2 devices is powered by the OMAP's
VREF_DQ_OUT pins. So the net effect here is that only half of the DDR3 devices were being
supplied a VREF! This was clearly a mistake. The second change improves the robustness of
the interface and was specifically seen to cure corruption observed at high temperatures
on some boards.
With the above two changes better memory stability was observed with extended
temperature ranges around 100C.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Current predefines do not fit cm-t3730 very well (some of them produce
artifacts in the image).
Update LCD predefines to accommodate both cm-t35 and cm-t3730 modules.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Turn on GPIO commands for cm-t35 and cm-t3730.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Current default bootdelay of 10 seconds is too long.
Reduce default bootdelay to 3 seconds.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
UART booting is supported on this SoC, but via UART3 rather than UART1.
Because of this we must change the board to use UART3 for all console
access (only one UART is exposed on this board and a slight HW mod is
required to switch UARTs).
Signed-off-by: Minal Shah <minal.shah@ti.com>
[trini: Make apply to mainline, reword commit]
Signed-off-by: Tom Rini <trini@ti.com>
With changes to increase the size of the device tree (required to move
more data out of the kernel and into DT), loading the args at the old
address leads to us overwriting things later on. To correct this, load
the args file to where we load the device tree anyhow. This is also
safe for non-DT booting as in either case we use r2 to pass in the
location of things.
Signed-off-by: Tom Rini <trini@ti.com>
Compulab OMAP3 boards use the same display initialization code.
Move the display initialization code to live under board/compulab/common
directory.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Compulab boards use the same eeprom code, so move the eeprom related
code to live under board/compulab/common directory.
Also make several adjustments to eeprom functions namespace, so it will
be generic for compulab boards.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Increase the tested memory region for mtest and define
CONFIG_SYS_MEMTEST_SCRATCH for CONFIG_SYS_ALT_MEMTEST
Signed-off-by: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Silent u-boot and no bootdelay
Signed-off-by: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new tricordereeprom command can read and write the eeprom for hardware
detection on tricorder devices.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Before we always ran 'mtdparts default' which also set the mtdparts and mtdids
environment. But if we changed that values by intention we will overwrite
them with our default values. This is obviously bad!
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The 'flashcard' u-boot configuration has a readonly environment and boots a
bare kernel/initrd to program the device from an clean environment.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new flash layout respects posible bad blocks in sectors reserved for e.g.
SPL, u-boot, kernel, env a.s.o.
Additionally this patch prepares for U-Boot Falcon mode for boot time saving.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
- switch to correct ecc layout used by the RBL
enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
- update default environment
- change A2CR to correct value for UART boot mode
- adapt cs3cfg timings for nand
- change LED bootmode signalization
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
enable the RBL/UBL ECC layout through
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define
see for more info:
http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEPv2 board and the IGEP COM Module use a TI
OMAP35xx/DM37xx processor, is better to rename its board
config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEP COM AQUILA use a TI AM335x processor is better
to rename its board config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Enable the bootcount driver for am335x in general. We leave adding a
bootlimit and altbootcmd to the environment to the board ports.
Signed-off-by: Tom Rini <trini@ti.com>
The RTC IP block here provides 3 scratch registers. Currently when
using DeepSleep on am335x the scratch0/1 registers are used so moving
ourself to scratch2 makes cooperation easier.
Signed-off-by: Tom Rini <trini@ti.com>
There is no real benefit in adding the board name into U-boot's prompt.
Use the simple "=> " prompt across FSL boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
The 6x_upgrade script is used to upgrade U-Boot in SPI-NOR
on Nitrogen6x/SABRE Lite boards using U-Boot's 'sf' command.
U-Boot is placed at offset 0x400 in flash, and the script
currently only erases 0x50000 bytes. Since the current
head is 319k, any additional features enabled in the
configuration will exceed the space erased and cause errors
re-programming the device.
This patch increases the erase size to the full size of
the region allocated for the U-Boot binary.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn
DRAM controller registers so the DRAM module will be correctly
recognised.
Signed-off-by: Christoph G. Baumann <c.baumann@ppc-ag.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
In case the board detected sufficient voltage for battery boot,
make sure the DCDC converter is ON and the board is not running
only from linregs, otherwise an instability will be observed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This removes the PAD_CTL_DSE_120ohm as done for i.MX6Q's IPU1_DI0_PIN4
pin definition and makes it aligned with 3.0.35-4.1.0 and 3.12
mainline kernel.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
setup_wdog macro is not used anywhere, so just remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Currently the driver clears WCR_SRS bit when enabling
the watchdog and this causes a software reset. Do not
clear WCR_SRS.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
In case the MX23/MX28 is switched into JTAG mode via the BootMode select
switches, the BootROM bypasses the CPU core registers initialization.
This in turn means that the Stack Pointer (SP) register is not set as
it is in every other mode of operation, but instead is only zeroed out.
To prevent U-Boot SPL from crashing in this obscure JTAG mode, configure
the SP to point at the CONFIG_SYS_INIT_SP_ADDR if the SP is zeroed out.
Note that in case the SP is already configured, we must preserve that exact
SP value and must not modify it. This is important since in every other mode
but the JTAG mode, the SPL returns into the BootROM and BootROM in turn loads
U-Boot itself. If the SP were to be corrupted, the BootROM won't be able to
continue it's operation after returned from SPL and the system would crash.
Finally, add the JTAG mode switch identifier, so it's not recognised as
Unknown mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>