6 Commits

Author	SHA1	Message	Date
Kever Yang	9489b5c7ba	rockchip: rk3288: use default value for SYS_MALLOC_F_LEN ... There is no difference in rk3288 board use for SYS_MALLOC_F_LEN, so we can use default value. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>	2019-07-20 23:59:44 +08:00
Simon Goldschmidt	f89d6133ee	configs: move CONFIG_SPL_TEXT_BASE to Kconfig ... Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>	2019-04-29 21:41:40 -04:00
Tom Rini	d168bcb6fe	configs: Resync with savedefconfig ... Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>	2019-04-29 21:41:40 -04:00
Patrick Delaunay	14453fbfad	Convert CONFIG_SF_DEFAULT_* to Kconfig ... This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>	2019-03-25 17:36:53 -04:00
Tom Rini	7ae2729401	configs: Resync with savedefconfig ... Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>	2019-02-07 14:53:03 -05:00
Marty E. Plummer	8e2e601c5f	rockchip: add support for veyron-speedy (ASUS Chromebook C201) ... This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>	2019-02-01 16:59:10 +01:00