Commit Graph

4685 Commits

Author SHA1 Message Date
Wolfgang Denk
23c5189e6c Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-04-07 23:55:47 +02:00
Wolfgang Denk
6de5420370 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-07 23:52:32 +02:00
Stefan Roese
e54ec0f016 ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-03 14:50:34 +02:00
Stefan Roese
1c2926abdd ppc4xx: Canyonlands: Init SATA/PCIe port correctly
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-02 08:39:33 +02:00
Larry Johnson
eb14ebe813 ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup
Signed-off-by: Larry Johnson <lrj@acm.org>
2008-03-31 12:20:59 +02:00
Stefan Roese
02e3892021 ppc4xx: Small whitespace fix of esd patches
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-31 12:20:48 +02:00
Matthias Fuchs
034394abb5 ppc4xx: Cleanup PMC440 board support
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:48:02 +02:00
Matthias Fuchs
a6cc6c3718 ppc4xx: Add ptm configuration variables for PMC440
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.

Cleanup pci_target_init.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:47:36 +02:00
Matthias Fuchs
7c91f51a2f ppc4xx: Minor updates for DU440 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:47:09 +02:00
Daniel Hellstrom
97bf85d784 MTD/CFI: flash_read64 is defined a weak function (for SPARC)
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-03-29 06:51:04 +01:00
Stefan Roese
cc8e839abc ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 14:09:04 +01:00
Tor Krill
90447ecbba MTD/CFI: Add support for 16bit legacy AMD flash
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback

Signed-off-by: Tor Krill <tor@excito.com>
2008-03-28 11:44:23 +01:00
Stefan Roese
5e12e75d17 ppc: Small change to CFG_MEM_TOP_HIDE description
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 11:02:53 +01:00
Bartlomiej Sieka
74d1e66d22 Fix host tool build breakage, take two
Revert commit 87c8431f and fix build breakage so that the build continues
to work on FC systems.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-27 23:49:12 +01:00
Stefan Roese
7e4a0d25ed ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.

We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 11:01:49 +01:00
Larry Johnson
6433fa202a ppc4xx: Updates to Korat-specific code
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:

(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;

(2) a new memory map for the registers in the board's CPLD;

(3) a revised format for manufacturer's data in serial EEPROM; and

(4) changes to track updates to U-Boot for the Sequoia board.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-03-27 10:52:03 +01:00
Markus Brunner
f766cdf89b ppc4xx: PPC405EP Set EMAC noise filter bits
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:47:28 +01:00
Mike Nuss
f66e2c8b25 ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.

Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-27 10:38:54 +01:00
Haavard Skinnemoen
87c8431fe2 new-image: Fix host tool build breakage
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-03-27 10:30:45 +01:00
Stefan Roese
6fb4b64056 ppc: Set CFG_MEM_TOP_HIDE to 0 if not already defined
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:24:03 +01:00
Stefan Roese
9462732a3e ppc4xx: Add fdt support to Prodrive alpr
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:20:02 +01:00
Pieter Voorthuijsen
511e4f9e7f ppc4xx: Enable cache support on the ALPR board
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
2008-03-27 10:19:57 +01:00
Stefan Roese
14f73ca679 ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.

This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:

CHIP_11: End of memory range area restricted access.
Category: 3

Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.

Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.

Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.

This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia

The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:

PMC440.h:
/* esd expects pram at end of physical memory.
 * So no logbuffer at the moment.
 */

It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:12:07 +01:00
Stefan Roese
c664bf8c3c ppc4xx: Fix Canyonlands linker script (remove bogus ASSERT)
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:09:05 +01:00
Stefan Roese
d56a3ce179 ppc4xx: Correctly pass phyiscal FLASH base address into dtb
The routine ft_board_setup() configures the EBC NOR mappings for the
Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
problem, we need to pass the corrected address here too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
9ad31989de ppc4xx: Fix compilation warning in 4xx_enet.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
4c9e855734 ppc4xx: Add AMCC Glacier 406GT eval board support
This patch adds support for the AMCC Glacier 460GT eval board.
The main difference to the Canyonlands board are listed here:

- 4 ethernet ports instead of 2
- no SATA port
- no USB port

Currently EMAC2+3 are not working. This will be fixed in a later
release.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
d8bd643141 ppc4xx: Mask 'vec' with 0x1f in uic_interrupt() for bit set/clear
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:03 +01:00
Wolfgang Denk
234ea73c66 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-03-27 00:19:13 +01:00
Anatolij Gustschin
b9670dd85b Fix out of tree building issue
Currently U-Boot building in some external directory
doesn't work. This patch tries to fix the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:18:58 +01:00
Wolfgang Denk
38b189fe74 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-03-27 00:16:34 +01:00
Wolfgang Denk
0207fefa4d Merge branch 'master' of git://www.denx.de/git/u-boot-usb 2008-03-27 00:16:18 +01:00
Anatolij Gustschin
d4ee711d8a README: update documentation (availability, links, etc.)
Fix typo in README

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:13:42 +01:00
Anatolij Gustschin
e813eae3bf Fix compilation error in cmd_usb.c
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:12:56 +01:00
Timur Tabi
d8c82db482 Add support for setting the I2C bus speed in fsl_i2c.c
Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
the I2C bus speed.  Current 8[356]xx boards define the CFG_I2C_SPEED macro,
but fsl_i2c.c ignores it and uses conservative value when programming the
I2C bus speed.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-03-27 00:09:17 +01:00
Wolfgang Denk
d049cc7f71 Coding style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-27 00:03:57 +01:00
Dave Liu
fd0b1fe3c3 drivers: add the support for Freescale SATA controller
Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.

The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:58 +01:00
Dave Liu
bede87f4c8 ata: add the readme for SATA command line
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:55 +01:00
Dave Liu
cd54081cd4 ata: enable the sata initialize on boot up
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:54 +01:00
Dave Liu
69386383c5 ata: add the fis struct for SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:54 +01:00
Dave Liu
ffc664e80d ata: add the libata support
add simple libata support in u-boot

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:53 +01:00
Dave Liu
8e9bb43429 ata: make the ata_piix driver using new SATA framework
original ata_piix driver is using IDE framework, not real
SATA framework. For now, the ata_piix driver is only used
by x86 sc520_cdp board. This patch makes the ata_piix driver
use the new SATA framework, so

- remove the duplicated command stuff
- remove the CONFIG_CMD_IDE define in the sc520_cdp.h
- add the CONFIG_CMD_SATA define to sc520_cdp.h

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:52 +01:00
Dave Liu
c7057b529c ata: add the support for SATA framework
- add the SATA framework
- add the SATA command line

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:51 +01:00
Dave Liu
83c7f470a4 ata: merge the header of ata_piix driver
move the sata.h from include/ to drivers/block/ata_piix.h

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:50 +01:00
Dave Liu
9eef62804d ata: merge the ata_piix driver
move the cmd_sata.c from common/ to drivers/ata_piix.c,
the cmd_sata.c have some part of ata_piix controller drivers.
consolidate the driver to have better framework.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:48 +01:00
Markus Klotzbuecher
b9e749e953 USB, Storage: fix a bug introduced in commit
f6b44e0e4d that will cause usb_stor_info
to only print only information on one storage device, but not for
multiple.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 18:26:43 +01:00
Anatolij Gustschin
841e5edd16 Fix compilation error in cmd_usb.c
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 18:09:55 +01:00
Kumar Gala
dd6c910aad 85xx: Add cpu_mp_lmb_reserve helper to reserve boot page
Provide a board_lmb_reserve helper function to ensure we reserve
the page of memory we are using for the boot page translation code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Kumar Gala
79679d8002 85xx: Update multicore boot mechanism to ePAPR v0.81 spec
The following changes are needed to be inline with ePAPR v0.81:

* r4, r5 and now always set to 0 on boot release
* r7 is used to pass the size of the initial map area (IMA)
* EPAPR_MAGIC value changed for book-e processors
* changes in the spin table layout
* spin table supports a 64-bit physical release address

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Jon Loeliger
25eedb2c19 FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed.  And CONFIG_ defines were added
to various board config files to make sure that happens.

The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.

Boards that are CDS specific were renamed with cds_ prefix.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-26 11:43:04 -05:00