Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
It's derived from ehci-mxc and uses the header files of the
ehci-fsl interface. The callback board_ehci_hcd_init() has
been introduced to allow for board-specific setup when USB
is started.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Remy Bohmer <linux@bohmer.net>
This commit enables support for USB Gadgets on the GONI
reference target.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
This commit provides UDC driver support for Samsung's SoC
family of processors.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
The usb_endpoint_descriptor struct is 7 bytes large and is
defined as an array (ep_desc[USB_MAXENDPOINTS])
in the usb_interface struct in include/usb.h
This fact will result in that every odd index in that
array will start at an uneven address, this in
turn makes accesses to u16 wMaxPacketSize unaligned.
Such accesses are illegal on the OpenRISC architecture
(as well as other architectures) and will render a bus error.
Setting the aligned(2) attribute on usb_endpoint_descriptor
will force wMaxPacketSize to a 16-bit boundary.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
According to the EHCI specification the Capability Register Length
has a size of 8 bits.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
* 'master' of git://git.denx.de/u-boot-arm:
M28: Cleanup memsize.o OOT build
i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28
M28: Fix typo
M28: Document that units has to be set to sectors on SD bootcard
i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
i.mx: mxc_gpio: add the i.mx6q support
i.mx: add the initial support for freescale i.MX6Q processor
i.mx: introduce the armv7/imx-common folder
S5PC2XX: Rename S5pc2XX to exynos
tegra2: Don't use board pointer before it is set up
tegra2: Remove unneeded 'dynamic ram size' message
tegra2: Remove unused low-level Tegra2 UART code
tegra2: Remove unneeded config option
tegra2: Remove unneeded boot code
tegra2: Enable instruction cache
arm: Move CP15 init out of cpu_init_crit()
tegra2: Simplify tegra_start() boot path
tegra2: Add arch_cpu_init() to fire up Cortex-A9
tegra2: Use new GPIO APIs in gpio_config_uart()
tegra2: Add support for Ventana
tegra2: Modify MMC driver to handle power and cd GPIOs
tegra2: Move board_mmc_init into board files
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
Update pci_ids.h from current Linux sources
omap: overo: Use ubifs instead of jffs2 for nand
omap: TWL4030 Bump VMMC1 interface voltage from 3V to 3.15V
The current way memsize.c is built just made a symlink into the directory
with SPL and then compiled it like any other file there. This was bad as that
broke the out-of-tree build.
The new way introduced in this patch uses the standard spl/Makefile methods
(CONFIG_SPL_LIBCOMMON_SUPPORT / CONFIG_SPL_LIBGENERIC_SUPPORT) to let files in
common/ be built. Because common/Makefile says memsize.c is always built (SPL
and non-SPL build), this fixes our issue with memsize.c out-of-tree build.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This moves SPL to common location so it can be reused by multiple boards. Also,
this commit adjusts M28 SoM to avoid breakage due to the move.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.
There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.
In order to better adapt and reuse code across various upcoming Samsung Exynos
based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
are renamed as exynos4/EXYNOS4.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
CONFIG_ENABLE_CORTEXA9 and CONFIG_SKIP_RELOCATE_UBOOT are not needed,
so remove them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.
The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Ventana is a board which is very similar to Seaboard. Support it by
re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
v6: Make gpio_config_uart_seaboard() static.
v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
he asked me to add myself for this board.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This change copies over the pci_ids.h file from Linux verbatim, plus a few
ids that had been added by hand. The last non-merge change hash in that
file in the kernel repository was:
8930c8aa740b12ad69f44a35137bcc39bfa3dc41
and the kernel was at version 2.6.38.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
[agust@denx.de: updated to preserve used PCI IDs]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
MMC interfaces are specified to be 3.3V compatible with an operating
voltage range of 3.1V to 3.5V for SD cards. This change affects
hardware using TWL4030 (TPS6595x) PMICs and should improve the
reliability when communicating with marginally-spec'd MMC devices.
3.15V is the highest possible level for this chip. This patch
has been tested on a Gumstix Overo board.
Signed-off-by: Ash Charles <ash@gumstix.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
The eXMeritus HWW-1U-1A unit is a DO-160-certified 13lb 1U chassis
with 3 independent TEMPEST zones. Two independent P2020 computers may
be found inside each zone. Complete hardware support is included.
High-level hardware overview:
* DO-160 certified for passenger aircraft (noncritical)
* TEMPEST ceritified for RED/BLACK separation
* 3 zones per chassis, 2 computers per zone (total of 6)
* Dual-core 1.066GHz P2020 per computer
* One 2GB DDR2 SO-RDIMM module per computer (upgradable to 4GB)
* Removable 80GB or 160GB Intel X18-M SSD per computer
* Front-accessible dual-port E1000E per computer
* Front-accessible serial console per computer
* Front-accessible USB port per computer
* Internal Gigabit crossover within each TEMPEST zone
* Internal unidirectional fiber links across TEMPEST zones
* Battery-backed DS1339 I2C RTC on each CPU.
Combined, each 13lb 1U chassis contains 12GB RAM, 12 cores @ 1.066GHz,
12 front-accessible Gigabit Ethernet ports and 960GB of solid-state
storage with a total power consumption of ~200W.
Additional notes:
* SPD detection is only known to work with the DO-160-certified DIMMs
* CPU reset is a little quirky due to hardware misfeature. Proper
support for the hardware reset mechanism has been left for a later
patch series to address.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds support for console output before the console is inited.
The main purpose of this is to deal with a very early panic() which would
otherwise cause a silent hang.
A new board_pre_console_putc() function is added to the board API. If
provided by the board it will be called in the event of console output
before the console is ready. This function should turn on all UARTs and
spray the character out if it possibly can.
The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
This fixes the build of the two sh boards shmin and r7780mp and qemu-mips
which currently fail to build due to dropped pre-CONFIG_NET_MULTI code.
This v2 patch minimizes the number of lines in the diff for easy review
and to eliminate any possible accidential changes resulting from moving
lines of code in the file. This also makes the register function very easy.
Any cleanups and improvements are intentionally deferred to follow-up patches
to keep this patch as simple and as easy to review as possible.
A new driver register function, ne2k_register() calls the existing
one-time setup part of the old init function and calls eth_register().
Changes to shmin, r7780mp and qemu-mips:
- Call the new ne2k_register() from board_eth_init() of the boards.
- Tested using qemu-mips board,
- Tested the two renesas / sh boards r7780mp and shmin to compile again,
and should work.
checkpatch-clean when "--ignore VOLATILE" is added to .checkpatch.conf,
and no warnings introduced in none of the three boards using this driver.
Signed-off-by: Bernhard Kaindl <bernhard.kaindl@gmx.net>
The BAB7xx boards are almost deceased. They cause build warnings, an
it's not worth the effort to fix these. Remove the dead body.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
* 'master' of git://git.denx.de/u-boot-arm:
davinci: Remove unwanted memsize.c from hawkboard's nand spl build
devkit8000: Move CONFIG_SYS_TEXT_BASE out of bss
da850evm: pass board revision info to kernel
arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warnings
arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warnings
MX35: flea3: changes due to hardware revision B
MX: serial_mxc: cleanup removing nasty #ifdef
M28: Fix OB1 bug in GPIO driver
MXS: Add static annotations to dma driver
apbh_dma: return error value on timeout
Efika: Configure additional regulators for HDMI output
mx5: Correct a warning in clock.c
MC13892: Add REGMODE0 bits definitions
mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
OMAP3: Add SPL_BOARD_INIT hook
AM3517 CraneBoard: Add SPL support
AM3517: Add SPL support
OMAP3: Add SPL support to omap3_evm
OMAP3: Add SPL support to Beagleboard
OMAP3 SPL: Add identify_nand_chip function
OMAP3 SPL: Rework memory initalization and devkit8000 support
OMAP3: Suffix all Micron memory timing parts with their speed
OMAP3: Add optimal SDRC autorefresh control values
omap3: mem: Add MCFG helper macro
OMAP3: Remove get_mem_type prototype
OMAP3: Change mem_ok to clear again after reading back
OMAP3: Add a helper function to set timings in SDRC
OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
omap3: mem: Comment enable_gpmc_cs_config more
ARM: davici_emac: Fix condition for number of phy detects
arm: printf() is not available in some SPL configurations
arm, davinci: add support for am1808 based enbw_cmc board
arm, davinci: move misc function in arch tree
arm, board/davinci/common/misc.c: Codingstyle cleanup
arm, davinci, da850: add uart1 tx rx pinmux config
arm, davinci: move davinci_rtc struct to hardware.h
arm, davinci: Remove duplication of pinmux configuration code
arm, hawkboard: Use the pinmux configurations defined in the arch tree
arm, da850evm: Use the pinmux configurations defined in the arch tree
arm, da850: Add pinmux configurations to the arch tree
arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
arm, davinci: Move pinmux functions from board to arch tree
arm, arm926ejs: always do cpu critical inits
omap_gpmc: use SOFTECC in SPL if it's enabled
nand_spl_simple: add support for software ECC
AM3517: move AM3517 specific mux defines to generic header
AM35xx: add EMAC support
davinci_emac: hardcode 100Mbps for AM35xx and RMII
davinci_emac: fix for running with dcache enabled
arm926ejs: add noop implementation for dcache ops
davinci_emac: conditionally compile specific PHY support
davinci_emac: use internal addresses in buffer descriptors
davinci_emac: move arch-independent defines to separate header
BeagleBoard: config: Really switch to ttyO2
ARM: davinci_dm6467Tevm: Fix build breakage
ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
ARM: OMAP3: Remove unused define SDRC_R_C_B
ARM: OMAP3: Remove unused define CONFIG_OMAP3430
omap4: fix IO setting
omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
omap4460: add ES1.1 identification
omap4: emif: fix error in driver
omap: remove I2C from SPL
omap4460: fix TPS initialization
omap: fix cache line size for omap3/omap4 boards
omap4: ttyO2 instead of ttyS2 in default bootargs
omap: Improve PLL parameter calculation tool
start.S: remove omap3 specific code from start.S
armv7: setup vector
armv7: include armv7/cpu.c in SPL build
armv7: disable L2 cache in cleanup_before_linux()
arm, arm926ejs: Fix clear bss loop for zero length bss
PXA: Move colibri_pxa270 to board/toradex/
PXA: Flip colibri_pxa27x to pxa-common.h
PXA: Introduce common configuration header for PXA
PXA: Rename pxa_dram_init to pxa2xx_dram_init
PXA: Squash extern pxa_dram_init()
PXA: Export cpu_is_ and pxa_dram_init functions
PXA: Cleanup Colibri PXA270
PXA: Replace timer driver
PXA: Add cpuinfo display for PXA2xx
PXA: Separate PXA2xx CPU init
PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
PXA: Unify vpac270 environment size
PXA: Enable command line editing for vpac270
PXA: Adapt Voipac PXA270 to OneNAND SPL
PXA: Drop Voipac PXA270 OneNAND IPL
PXA: Fixup PXA25x boards after start.S update
PXA: Re-add the Dcache locking as RAM for pxa250
PXA: Rework start.S to be closer to other ARMs
PXA: Drop XM250 board
PXA: Drop PLEB2 board
PXA: Drop CRADLE board
PXA: Drop CERF250 board
Fix regression in SMDK6400
nand: Add common functions to linux/mtd/nand.h
Ethernut 5 board support
net: Armada100: Fix compilation warnings
ARM: remove duplicated code for LaCie boards
ARM: add support for LaCie 2Big Network v2
mvsata: fix ide_preinit for missing disks
netspace_v2: Read Ethernet MAC address from EEPROM
omap3evm: Add support for EFI partitions
part_efi: Fix compile errors
TPM (Trusted Platform Module) is an integrated circuit and
software platform that provides computer manufacturers with the
core components of a subsystem used to assure authenticity,
integrity and confidentiality.
This driver supports version 1.2 of the TCG (Trusted Computing
Group) specifications.
The TCG specification defines several so called localities in a
TPM chip, to be controlled by different software layers. When
used on a typical x86 platform during the firmware phase, only
locality 0 can be accessed by the CPU, so this driver even while
supporting the locality concept presumes that only locality zero
is used.
This implementation is loosely based on the article "Writing a
TPM Device Driver" published on http://ptgmedia.pearsoncmg.com
Compiling this driver with DEBUG defined will generate trace of
all accesses to TMP registers.
This driver has been tested and is being used in three different
functional ChromeOS machines (Pinetrail and Sandy Bridge Intel
chipsets) all using the same Infineon SLB 9635 TT 1.2 device.
A u-boot cli command allowing access to the TPM was also
implemented and is being submitted as a second patch.
Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
CC: Wolfgang Denk <wd@denx.de>
This reverts commit 5c45a22b92.
It causes a lot of "incompatible pointer type" warnings for a large
number of Ethernet drivers, which are not really worth fixing
especially as this patch was only supposed to help the old,
deprecated miiphy API. Instead of adding more efforts to a lost case
we rather revert it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This moves CONFIG_SYS_TEXT_BASE one MB after beginning of SD-RAM. Move
CONFIG_SYS_SPL_MALLOC_START to have one MB of free space for the u-boot
image.
CONFIG_SYS_TEXT_BASE was in the middle of the bss-section. This was the
reason for the problems with MMC boot described here:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/118711
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Tom Rini <trini@ti.com>
there are two boards based on da850 SOC - OMAP-L138 and AM18x.
In order to differentiate between these two boards, revision id
is passed to kernel via second byte of ATAG_REVISION.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Revision B of the board uses CSD0 for the DRAM,
as usual for MX3 boards. The patch fixes also
some values in the U-Boot environment.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from driver.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Helmut Raiger <helmut.raiger@hale.at>
CC: John Rigby <jcrigby@gmail.com>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4
doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000.
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
The only change of note is that we move from 0x80008000 to 0x80100000
for CONFIG_SYS_TEXT_BASE
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Tested-by: Koen Kooi <k-kooi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
The only change of note is that we move from 0x80008000 to 0x80100000
for CONFIG_SYS_TEXT_BASE
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>.
This also changes CONFIG_SYS_TEXT_BASE to 0x80100000.
Signed-off-by: Tom Rini <trini@ti.com>
This introduces 200MHz Micron parts timing information based on x-loader
to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init
logic is also based on what x-loader does in these cases. Note that
while previously u-boot would be flashed in with SW ECC in this case it
now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to
0x80100000.
Cc: Dirk Behme <dirk.behme@gmail.com>
Beagleboard rev C5, xM rev A:
Tested-by: Tom Rini <trini@ti.com>
Beagleboard xM rev C:
Tested-by: Matt Ranostay <mranostay@gmail.com>
Beagleboard rev B7, C2, xM rev B:
Tested-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework. In SPL we try and initialize both CS0 and CS1.
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
- booting from NOR Flash with direct boot method
- POST support
- LOGBUF support
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Christian Riesch <christian.riesch@omicron.at>
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the hawkboard use these definitions instead of
defining its own.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the da850evm use these definitions instead of
defining its own.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
The previous commit changed it to "zero two" instead of the proper "Oh two". This was completely broken!
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Acked-by: Tom Rini <trini@ti.com>
Fix:
arch/arm/cpu/arm926ejs/davinci/libdavinci.o: In function `timer_init':
/work/agust/git/u-boot/arch/arm/cpu/arm926ejs/davinci/timer.c:62:
undefined reference to `davinci_arm_clk_get'
drivers/i2c/libi2c.o: In function `i2c_init':
/work/agust/git/u-boot/drivers/i2c/davinci_i2c.c:102:
undefined reference to `davinci_arm_clk_get'
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Acked-by: Tom Rini <trini@ti.com>
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:
1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly loads kernel.
2. Align the CONFIG_SYS_TEXT_BASE between TI internal
U-Boot and mainline U-Boot. This avoids a lot of confusion
and allows for the inter-operability of x-loader, SPL,
internal U-Boot, mainline U-Boot etc. The internal U-Boot's
address can not be changed to that of mainline U-Boot
as internal U-Boot doesn't have relocation and 0x80100000
used by mainline U-Boot will clash with kernel
3. Assume only a minimum amount of memory that may be available
on any practical OMAP4/5 board in future too. We are assuming
a minimum of 128 MB of memory
Signed-off-by: Aneesh V <aneesh@ti.com>
