Commit Graph

24755 Commits

Author SHA1 Message Date
Nobuhiro Iwamatsu
172437472a net: sh-eth: Add support R8A7794
R8A7794 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7794.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2014-07-24 14:03:46 +09:00
Chin Liang See
23f23f23d5 socfpga: Relocate arch common functions away from board
To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2014-07-05 10:14:46 +02:00
Linus Walleij
7285c09560 integrator: switch to generic board
Turn on generic board for the integrators, as per the request in
the startup message. Everything just works, tested on the
Integrator/AP and Integrator/CP.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-05 09:32:59 +02:00
Stephen Warren
2460e17593 ARM: rpi_b: enable GENERIC_BOARD
Serial port, SD card, and LCD all work.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-05 09:32:18 +02:00
Christian Riesch
30493aac62 arm, calimain: Add CONFIG_SYS_GENERIC_BOARD
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
2014-07-05 09:30:49 +02:00
Shaibal.Dutta
fe0d925299 arm: Fix armv8 compilation error
Fix following compilation error when CONFIG_ARM64 is defined

Error: unknown or missing system register name at operand 2
-- `mrs x0,daifmsr daifset,#3'

Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com>
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Darwin Rambo <drambo@broadcom.com>
2014-07-05 09:30:20 +02:00
Łukasz Dałek
445abdf9e0 arm:board:h2200: Add CONFIG_SYS_GENERIC_BOARD
Enable 'generic board init' for H2200 palmtop.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-07-05 09:29:03 +02:00
Jeroen Hofstee
ed6c7f7f6e arm: spl: fix include guard
cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-05 09:28:21 +02:00
Albert ARIBAUD
4009bed469 Reformat boards.cfg
Run tools/reformat.py -i -d '-' -s 8
to reorder boards as header comments suggest
2014-07-05 00:36:57 +02:00
Chin Liang See
dc4d4aa14b socfpga: Adding Scan Manager driver
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2014-07-05 00:27:27 +02:00
Chin Liang See
05b884b5cd socfpga: Adding DesignWare watchdog support
To enable the DesignWare watchdog support at SOCFPGA
Cyclone V dev kit.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-07-05 00:24:18 +02:00
Chin Liang See
d8c67dc6e1 watchdog/denali: Adding DesignWare watchdog driver support
To add the DesignWare watchdog driver support. It required
information such as register base address and clock info from
configuration header file  within include/configs folder.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-07-05 00:24:16 +02:00
Sergey Kostanbaev
7237d22baa arm: ep9315: Return back Cirrus Logic EDB9315A board support
This patch returns back support for old ep93xx processors family

Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
2014-07-04 23:45:48 +02:00
Axel Lin
c0c374024d gpio: spear_gpio: Fix gpio_set_value() implementation
In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.

The address bus is used as a mask on read/write operations, so that independent
software drivers can set their GPIO bits without affecting any other pins in a
single write operation. Thus we don't need a read-modify-write to update the
register.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2014-07-04 21:37:29 +02:00
Jeroen Hofstee
fcfddfd504 ARM: cache_v7: use __weak
This is not only more readable but also prevents a warning
about a missing prototype. The prototypes which are actually
missing are added.

cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Tom Rini <trini@ti.com>
2014-07-04 19:57:22 +02:00
York Sun
f749db3a75 ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support
LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2014-07-04 19:48:41 +02:00
J. German Rivera
b940ca64b2 armv8/fsl-lsch3: Add support to load and start MC Firmware
Adding support to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated with the location of these images.
Deasserting the reset bit of MC GCR register releases core 0 to run.
Core 1 will be released by MC firmware. Stop bits are not touched for
this step. U-boot waits for MC until it boots up. In case of a failure,
device tree is updated accordingly. The MC firmware image uses FIT format.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
2014-07-03 08:40:58 +02:00
York Sun
2f78eae506 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on emulators. After u-boot relocates to DDR, a new MMU
table with QBMan cache access is created in DDR. SMMU pagesize is set
in SMMU_sACR register. Both DDR3 and DDR4 are supported.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-07-03 08:40:51 +02:00
York Sun
22932ffc03 ARMv8: Adjust MMU setup
Make MMU function reusable. Platform code can setup its own MMU tables.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
2014-07-03 08:40:48 +02:00
J. German Rivera
0d031e046c Added 64-bit MMIO accessors for ARMv8
This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
2014-07-03 08:40:31 +02:00
Darwin Rambo
261d27605c arm: Add support for semihosting for armv8 fastmodel targets.
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.

Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.

Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
2014-07-03 08:35:45 +02:00
Tom Rini
fe8b3212b7 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-07-02 16:38:02 -04:00
Tom Rini
a176ff0705 Prepare v2014.07-rc4
Signed-off-by: Tom Rini <trini@ti.com>
2014-07-02 13:36:19 -04:00
Stephen Warren
dcb89b5aa0 usb: ci_udc: use var name ep/ci_ep consistently
Almost all of ci_udc.c uses variable name "ep" for a struct usb_ep and
"ci_ep" for a struct ci_ep. This is nice and consistent, and helps people
know what type a variable is without searching for the declaration.
handle_ep_complete() doesn't do this, so fix it to be consistent.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
369d3c439a USB: gadget: atmel: zero out allocated requests
A UDC's alloc_request method should zero out the newly allocated request.
Ensure the Atmel driver does so. This issue was found by code inspection,
following the investigation of an intermittent issue with ci_udc, which
was tracked down to failing to zero out allocated requests following some
of my changes. All other UDC drivers already zero out requests in one
way or another.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
639e9903c2 usb: ci_udc: don't memalign() struct ci_req allocations
struct ci_req is a purely software structure, and needs no specific
memory alignment. Hence, allocate it with calloc() rather than
memalign(). The use of memalign() was left-over from when struct ci_req
was going to hold the aligned bounce buffer, but this is now dynamically
allocated.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
6ac15fda4e usb: ci_udc: remove controller.items array
There's no need to store an array of QTD pointers in the controller.
Since the calculation is so simple, just have ci_get_qtd() perform it
at run-time, rather than pre-calculating everything.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
7e54188775 usb: ci_udc: fix items array size/stride calculation
2 QTDs are allocated for each EP. The current allocation scheme aligns
the first QTD in each pair, but simply adds the struct size to calculate
the second QTD's address. This will result in a non-cache-aligned
addresss IF the system's ARCH_DMA_MINALIGN is not 32 bytes (i.e. the
size of struct ept_queue_item).

Similarly, the original ilist_ent_sz calculation aligned the value to
ARCH_DMA_MINALIGN but didn't take the USB HW's 32-byte alignment
requirement into account. This doesn't cause a practical issue unless
ARCH_DMA_MINALIGN < 32 (which I suspect is quite unlikely), but we may
as well fix the code to be explicit, so it's obviously completely
correct.

The new value of ILIST_ENT_SZ takes all alignment requirements into
account, so we can simplify ci_{flush,invalidate}_qtd() by simply using
that macro rather than calling roundup().

Similarly, the calculation of controller.items[i] can be simplified,
since each QTD is evenly spaced at its individual alignment requirement,
rather than each pair being aligned, and entries within the pair being
spaced apart only by structure size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
06b38fcbae usb: ci_udc: lift ilist size calculations to global scope
This will allow functions other than ci_udc_probe() to make use of the
constants in a future change.

This in turn requires converting the const int variables to #defines,
since the initialization of one global const int can't depend on the
value of another const int; the compiler thinks it's non-constant if
that dependency exists.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
8d7c39d3e8 usb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs
Fix ci_ep_submit_next_request()'s ZLP transmission code to explicitly
call ci_get_qtd() to find the address of the other QTD to use. This
will allow us to correctly align each QTD individually in the future,
which may involve leaving a gap between the QTDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
d7beeb9358 usb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe()
ci_udc_probe() initializes a pair of QHs and QTDs for each EP. After
each pair has been initialized, the pair is cache-flushed. The
conversion from QH/QTD index [0..2*NUM_END_POINTS) to EP index
[0..NUM_ENDPOINTS] is incorrect; it simply subtracts 1 (which yields
the QH/QTD index of the first entry in the pair) rather than dividing
by two (which scales the range). Fix this.

On my system, this avoids cache debug prints due to requests to flush
unaligned ranges. This is caused because the flush calls happen before
the items[] array entries are initialized for all but EP0.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Albert ARIBAUD
304f936aea Merge remote-tracking branch 'u-boot-samsung/master'
Conflicts:
	boards.cfg

Conflict was trivial between goni maintainer change and
lager_nor removal.
2014-07-01 20:52:51 +02:00
Albert ARIBAUD
019b57cc1d Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' 2014-07-01 15:48:25 +02:00
Albert ARIBAUD
e99f30e105 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-07-01 15:11:18 +02:00
Albert ARIBAUD
d6694aff56 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2014-06-30 23:00:34 +02:00
Albert ARIBAUD
b5b8d85e9a Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master' 2014-06-30 22:19:03 +02:00
Przemyslaw Marczak
5287d59544 Samsung: Goni: change maintainer to Robert Baldyga
Robert Baldyga will now take care of this board.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-06-30 14:02:42 +09:00
Fabio Estevam
3f4c01d9f9 mx25pdk: Remove CONFIG_SYS_GENERIC_BOARD
With CONFIG_SYS_GENERIC_BOARD the board hangs after issuing a 'save' command.

Remove CONFIG_SYS_GENERIC_BOARD until this issue can be fixed properly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-06-26 10:17:19 +02:00
Stephen Warren
afb8e71cae dfu: free entities when parsing fails
When dfu_init_env_entities() fails part-way through, some entities may
have been added to dfu_list. These are only removed by dfu_free_entities().
If that function isn't called, those stale entities will still exist the
next time dfu_init_env_entities() is called, leading to confusion. Fix
do_dfu() to ensure that dfu_free_entities() is always called, to avoid
this confusion.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
2014-06-25 22:49:43 +02:00
Ilya Ledvich
08ebd467c8 usb: eth: smsc95xx: add LAN9500A device ID
Add LAN9500A product ID (0x9e00) in order to support LAN9500A based dongles.
Tested on cm_t335.

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
2014-06-25 22:46:28 +02:00
Jeroen Hofstee
29425be49b usb: fastboot: fix potential buffer overflow
cb_getvar tries to prevent overflowing the response buffer
by using strncat. But strncat takes the number of data bytes
copied as a limit not the total buffer length so it can still
overflow. Pass the correct value instead.

cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
cc: Rob Herring <robh@kernel.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-25 22:44:40 +02:00
Jeroen Hofstee
25d1936a19 usb: xhci: (likely) fix bracket in if condition
Because of the brackets the & and && is evaluated before
the comparison. This is likely not the intention. Change
it to test the first and second condition to both be true.

cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-25 22:43:16 +02:00
Jeroen Hofstee
19a2a67fa2 usb:g_dnl:f_thor: remove memset before memcpy
since ALLOC_CACHE_ALIGN_BUFFER defines a pointer and not a
buffer, the memset with sizeof(rqt) likely does something else
then intended. Since there is a memcpy directly after it with
the full size, drop the memset completely.

Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2014-06-25 22:42:40 +02:00
Jeroen Hofstee
933611f7bb usb:composite: clear the whole common buffer
Since the struct fsg_common is calloced, reset it completely
with zero's when reused. While at it, make checkpatch happy.

cc: Lukasz Majewski <l.majewski@samsung.com>
cc: Piotr Wilczek <p.wilczek@samsung.com>
cc: Kyungmin Park <kyungmin.park@samsung.com>
cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2014-06-25 22:42:07 +02:00
Yasuhisa Umano
198c5f998a usb: r8a66597: Fix initilization size of r8a66597 info structure
Initialization of r8a66597 info structure is not enough.
Because initilization was used size of pointer.
This fixes that use size of r8a6659 info structure.

Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
2014-06-25 22:38:04 +02:00
yasuhisa umano
8ecdce7280 usb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUB
This driver is processed as two USB hub despite one.
The number of root hub is defined in R8A66597_MAX_ROOT_HUB.
This fixes that register is accessed by using the definition
of R8A66597_MAX_ROOT_HUB.

Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
2014-06-25 22:31:41 +02:00
Jeroen Hofstee
51afc2c68c usb: cosmetic: double const
For plain array const can be either before or after
the type definition. Adding both is simply redundand.
Remove the later one.

cc: marex@denx.de
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-25 22:22:20 +02:00
Stephen Warren
83c3750088 usb: ci_udc: fix typo in debug message
s/ot/to/

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-25 22:22:20 +02:00
Stephen Warren
fb22ae6c7e usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
ci_udc.c's usb_gadget_unregister_driver() doesn't call driver->unbind()
unlike other USB gadget drivers. Fix it to do this.

Without this, when ether.c's CDC Ethernet device is torn down,
eth_unbind() is never called, so dev->gadget is never set to NULL.
For some reason, usb_eth_halt() is called both at the end of the first
use of the Ethernet device, and prior to any subsequent use. Since
dev->gadget is never cleared, all calls to usb_eth_halt() attempt to
stop, disconnect, and clean up the device, resulting in double cleanup,
which hangs U-Boot on my Tegra device at least.

ci_udc allocates its own singleton EP0 request object, and cleans it up
during usb_gadget_unregister_driver(). This appears necessary when using
the USB gadget framework in U-Boot, since that does not allocate/free
the EP0 request. However, the CDC Ethernet driver *does* allocate and
free its own EP0 requests. Consequently, we must protect
ci_ep_free_request() against double-freeing the request.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-25 22:22:20 +02:00
Stefano Babic
5d2ad2bc33 vf610: fix build due to missing sys_proto.h
commit 67a04ab3ab
fix the build for MX25. The same error
happens for VF610 SOC.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-06-25 12:48:06 +02:00