This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add clock control for ethernet controller on each SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Subtle ARC fixes for v2018.05-RC3
These are only very subtle clean-ups here and there including:
* Correctly specified CPU freq for HSDK
(production boards are all shipped with 500MHZ as opposed
to early batch running at 1GHz)
* Addition of SNPS internal group email to MAINTAINERS file
* Switch to Hush shell on AXS10x boards
In the commit "reset: Add get/assert/deassert/release for bulk of reset signals"
the disabled reset_release_bulk() and reset_get_bulk() used the wrong
struct clk_bulk instead of struct reset_ctl_bulk.
Fixes: 0c28233903 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
commit b4d956f6bc ("bootm: Align cache flush end address correctly")
aligns the end address of the cache flush operation to a cache-line size to
ensure lower-layers in the code accept the range provided and flush.
A similar action should be taken for the begin address of a cache flush
operation. The load address may not be aligned to a cache-line boundary, so
ensure the passed address is aligned.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reported-by: Breno Matheus Lima <brenomatheus@gmail.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This fixes the Coverity Defect CID 175347 when dev_count_phandle_with_args()
returns a negative value.
Fixes: a855be87da ("clk: Add get/enable/disable/release for a bulk of clocks")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
returns a negative value.
Fixes: 0c28233903 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The M2 Koelsch port was broken since some time. This patch updates
the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
"Global data" structure "gd" is not used in init_helpers.c
thus DECLARE_GLOBAL_DATA_PTR might be safely removed.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
CPU on HSDK board runs at 500MHz after preloader so fix
wrong CPU frequency value in hsdk_defconfig.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
None of the SoCFPGA platforms will support EFI/ISO partition types that
is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2
partition type.
This is needed to help limit the size of the SPL to within the 64k limit
that is required for SoCFPGA.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add code to look for a reset manager property. Specifically, look for the
reset-names of 'i2c'. A reset property is an optional feature, so only print
out a warning and do not fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus bringing the
IP out of reset.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable fitImage support to be on the right side of the millenium.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The SDHI is not routed to a slot on the Eagle, so disable it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the RPC QSPI driver on R8A77970 V3M Eagle and configure
the environment layout to match that used by old U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add device tree nodes for the Renesas RPC HF/QSPI controller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The mv_sdhci driver was not zeroing the sdhci_host structure it
allocates causing random access violations in parts of the mmc core
where the "ops" member pointers are checked and called if not NULL.
Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The line "-obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o"
is found twice in Makefile.
Fixes: ae74de0dfd ("serial: stm32: Rename serial_stm32x7.c to serial_stm32.c"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For CONFIG_ENV_FAT_INTERFACE != 'mmc' a link error
env/fat.c:93: undefined reference to `mmc_initialize'
occurs if CONFIG_MMC_SUPPORT is not enabled.
Fixes: 26862b4a40 ("env: mmc/fat/ext4: make sure that the MMC sub-system
is initialized before using it")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Relocate env drivers if manual relocation is enabled. This
patch fixes the issue of u-boot hang incase if env is
present in any of the flash devices.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 8e14ba7bd5 ("gpio: omap_gpio: Add DM_FLAG_PRE_RELOC
flag") omap GPIO gets bound before relocation. Unfortunately due to
this, on at least the beaglebone black, the pre-relocation memory pool
gets exhausted before probing the serial port. This then causes u-boot
to panic as CONFIG_REQUIRE_SERIAL_CONSOLE is set...
Resolve this by resizing the default size of the pre-relocation malloc
pool for AM335X platforms.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
We enabled CONFIG_ISO_PARTITION by default for distro boot, so that U-Boot
could load distro images that usually get shipped as iso images. These images
usually come with a board agnostic boot environment.
However, there is very little point in having ISO support enabled (for anyone
really) in SPL, as the whole idea of SPL is to load U-Boot proper which again
is board specific. So the fact that we enable ISO support in U-Boot proper does
not mean at all that we want ISO support in U-Boot SPL.
Hence, let's remove the Kconfig dependency. Along the way, let's also clean up
all those default configs that disabled SPL ISO support.
Signed-off-by: Alexander Graf <agraf@suse.de>
We only use coreboot as a target on x86 platforms, since on ARM platforms
U-Boot always runs as the primary boot loader. Rename the coreboot-x86
platform to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This updates the doc of booting VxWorks, like loading an x64 kernel,
and how to make VxWorks graphics console driver work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
On VxWorks x86 its bootline address is at a pre-defined offset @
0x1200. If 'bootaddr' is not passed via environment variable, we
assign its value based on the kernel memory base address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
There is a small duplication in do_bootvx() that does the bootline
copy. Refactor this a little bit to make it simpler.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
