The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
This is reincarnation of the U-Boot
commit 3469bf4274
Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Wed Jan 10 19:40:15 2018 +0200
x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
after upstream got eventually the Linux kernel
commit e6e094e053af75cbc164e950814d3d084fb1e698
Author: Juergen Gross <jgross@suse.com>
Date: Tue Nov 20 08:25:29 2018 +0100
x86/acpi, x86/boot: Take RSDP address from boot params if available
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The commit 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property
set error") fixed the double-loading of the primary atf-image, but didn't
take into account that there may be rare atf images with only that main
section present.
Right now this will result in a broken its due to the loadables section not
getting closed correctly, so fix that by adapting the guards around the loop.
The guards now protect against 0 segments when the bl31 binary doesn't
contain any section and 1 segment when only a core atf section is present.
Fixes: 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property set error")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Originally the cpuid var the value gets read into was defined as
u8 cpuid[RK3399_CPUID_LEN];
hence the sizeof(cpuid) would return the correct the correct number
of array elements.
With the move to a separate function cpuid becomes a pointer and
sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case.
We do have the actual id length available as function param so use
it for actual amount of bytes to read.
Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Tinker board needs to mux all the sdmmc gpio and
activate the regulator connected to bank 7. Remove
all the bank that are not in use and mark them as dm,spl
so-that it would initialize at SPL.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
newline \n was missed in fdt_path_offset, error loop.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM
has been defined, so drop the explicit enablement for vyasa board.
This change is supposed to missed during config move to
other locations, and missed to drop the same.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Add missing PCI range for translating DRAM to bus addresses.
This fixes e.g. PCI NIC interface and allows network to work
in QEMU.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Pass -m4 instead of -m4-nofpu to GCC versions which do not support
the -m4-nofpu option.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since binutils 2.30 , the resulting U-Boot binary was incorrectly linked
against address 0 instead of text base, fix it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
According to the latest am572x[1] and dra74x[2] data manuals, mmc3
default, hs, sdr12 and sdr25 modes use iodelay values given in
MMC3_MANUAL1. Set the MODE_SELECT bit for these so that manual mode is
selected and correct iodelay values are configured.
[1] http://www.ti.com/lit/ds/symlink/am5728.pdf
[2] http://www.ti.com/lit/ds/symlink/dra746.pdf
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
API get_ti_sci_handle() is relying on the device-tree node name
to be "dmsc" for probing the ti_sci device. But with the introduction
of debug messages for dmsc, the node name changed to dmsc@44083000.
Because of this ti_sci is never probed cause a boot failure. Instead
of relying on device-tree node name, use the first available firmware
node for probing ti_sci.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The da8xx GPIO driver is available with DM_GPIO support. This
patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO.
Signed-off-by: Adam Ford <aford173@gmail.com>
Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==================================================
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument
===================================================
Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
In SerDes protocol 0x13BB, lane C was erroneously assigned
to PCIE1, this is now updated to PCIE2
Fixes: 36f50b7523 ("armv8: ls1028a: Add other serdes
protocal support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.
Also enable the fixup when Layerscape Gen4 controller driver
is enabled.
Fixes: 4da0e52c9d (armv8: fsl-layerscape: fix config dependency
for layerscape pci code)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the device-tree structure describing the MUX in board dts.
QDS board has an on-board RGMII PHY and 4 slots for extension cards.
All these can be accessed over MDIO through a MDIO MUX controlled
over I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Use obj-$(config) instead of #ifdef $config to make the code looks
clean, and move the misc_init for U-Boot proper only.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The rk3188/Makefile already depends on !TPL_BUILD, so no need to add
this again in parent Makefile, remove it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
For sake of consistency use spaces over TABs in ASL code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.
Fixes: 5e99fde34a ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Per PCI firmware specification the ACPI has to reserve the memory
which is defined as PCI ECAM.
Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
GCC 9.2 starts complaining about possible pointer misalignment of
pointers to the unpacked (alignment=4) structures in the packed
(alignment=1) ones:
CC arch/x86/cpu/tangier/acpi.o
arch/x86/cpu/tangier/acpi.c: In function ‘acpi_create_fadt’:
arch/x86/cpu/tangier/acpi.c:22:37: warning: taking address of packed
member of ‘struct acpi_fadt’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
22 | struct acpi_table_header *header = &(fadt->header);
CC arch/x86/lib/acpi_table.o
arch/x86/lib/acpi_table.c: In function ‘acpi_create_spcr’:
arch/x86/lib/acpi_table.c:366:37: warning: taking address of packed
member of ‘struct acpi_spcr’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
366 | struct acpi_table_header *header = &(spcr->header);
Fix the potential issues by annotating embedded structures with
__packed even though they are packed naturally.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add GCC version number in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Use efi_add_conventional_memory_map() to configure EFI conventional memory
properly with ram_top value. This will give 32-bit mode U-Boot proper
conventional memory regions even if e820 has an entry which is greater than
32-bit address space.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[bmeng: fixed some typos in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If a crash occurs, show the loaded UEFI images to facilitate analysis.
This is an example output:
=> bootefi 0x1000000
Found 0 disks
Hello world of bugs!
Invalid Opcode (Undefined Opcode)
EIP: 0010:[<06ceb06e>] EFLAGS: 00010206
Original EIP :[<fec9906e>]
EAX: 00000000 EBX: 06cec000 ECX: 00000fd0 EDX: 00000001
ESI: 06ced18a EDI: 07d0fe10 EBP: 07fe27a0 ESP: 07d0fde0
DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018
CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: ffff0ff0 DR7: 00000400
Stack:
0x07d0fde8 : 0x00000000
0x07d0fde4 : 0x06ced040
--->0x07d0fde0 : 0x07fe27a0
0x07d0fddc : 0x00010206
0x07d0fdd8 : 0x00000010
0x07d0fdd4 : 0x06ceb06e
UEFI image [0x06cea000:0x06cf0fff] pc=0x106e '/bug-i386.efi'
### ERROR ### Please RESET the board ###
With the additional information provided by this patch we know that the
problem occurred 0x106e after the load address of bug-i386.efi.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Now that we are able to get the size of high memory from QEMU,
report its memory range as usable ram.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
At present only size of memory that is below 4GiB is retrieved from
QEMU. Add a function that gets size of memory that is above 4GiB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
This extracts getting memory size logic in dram_init() to a separate
routine qemu_get_low_memory_size(). No functional changes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Every x86 platform provides board_get_usable_ram_top(), hence there
is no need to provide a weak version board_get_usable_ram_top(), not
to mention there is another weak version board_get_usable_ram_top()
in common/board_f.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Using ACPI predefined macros, such as Zero or One, will reduce a binary
size of resulting ACPI tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: manually fixed the conflicts when applying]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot
- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
This clock has a different mbox ID so have this included in the relevant
header file.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Define two target configs for Raspberry Pi 4 (32 and 64bit) and the
corresponding BCM2838* configs.
Be aware of the current limitation in firmware which requires an
explicit configuration to force the arm in 64bit mode when the
respective target is used.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: rename BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Devices of bcm283x have different base address, depending if they are on
bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to
build and only add the offset in the header files.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Before we can send a message to the mailbox we have to check that there
is space to do so. Therefore we poll the status register. But up to now
the wrong status register, the one of mailbox 0, was checked. Fix this
by polling the status regiser of mailbox 1.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[mb: rename registers and update commit message]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add nodes for the Aspeed SD controllers with their necessary properties.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
