armv8: fsl-layerscape: Update I2C clock divider

By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Chuanhua Han 2019-08-08 17:04:58 +08:00 committed by Priyanka Jain
parent 412e25ab5f
commit 2f2a19757b

View File

@ -501,6 +501,10 @@ config SYS_FSL_I2C_CLK_DIV
config SYS_FSL_IFC_CLK_DIV
int "IFC clock divider"
default 1 if ARCH_LS1043A
default 4 if ARCH_LS1012A
default 4 if ARCH_LS1028A
default 8 if ARCH_LX2160A
default 8 if ARCH_LS1088A
default 2
help
This is the divider that is used to derive IFC clock from Platform