This patch adds support for the Calimain board from
OMICRON electronics GmbH. The board features a Texas Instruments AM1808
SoC, 128 MB DDR2 memory, and 64 MB NOR flash memory connected to CS2 and
CS3.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
The V bit of the c1 register of CP15 should not be cleared on DA850
SoCs since they have no valid memory at 0x00000000. This patch
introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
that allows setting the correct value for the V bit.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Reported-by: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
The current implementation invalidates the data cache before turning it
off and causes problems on the hawkboard. See the discussion in
http://lists.denx.de/pipermail/u-boot/2012-January/115212.html
According to the ARM926EJ-S Technical Reference Manual, the cache should
be flushed instead.
Also fix the comments to match code.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Rebased and corrected commit message.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
This patch reverts commit ca4b55800e
"arm, arm926ejs: always do cpu critical inits" since it impacts all
arm926ejs based configurations and caused problems, e.g., with
the hawkboard.
Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines
from the board configurations that need low level initialization.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
The low level initialization code in
arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for
DM644X SoCs only. This patch makes the lowlevel_init function in this
file a dummy function for SoCs other than DM644X.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Cc: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c". To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
The initial checkin dropped pinmux setup for GPMC pins A6-A10, D0-D7 and
NCS1/2 necessary to access LAN92xx on Logic OMAP35x/DM37x modules.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
We do not have thermal management or Smartreflex
enabled at U-Boot level. So, it's better to stick
to OPP100 for MPU instead of the OPP Turbo that is
used now. Adjust the VDD_MPU accordingly.
Tested-by: Sebastien Jan <s-jan@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer
required. This is because clock info will be printed as part
'bdinfo' command and also remove support print_cpuinfo() as it will
no longer be called.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
AM3517: Changed default clock rate for AM3517
Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows
the AM3517 to boot up at 600MHz instead of 500 MHz
Signed-off-by: Schuyler Patton <spatton@ti.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND, MMC, RTC, EHCI USB host and both
NAND and MMC SPLs are supported.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
The mt_ventoux board is a custom board using
the Technexion TAM3517 module.
The patch fixes also the mtdparts variable in the
TAM3517 common configuration file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ilya Yanok <yanok@emcraft.com>
CC: Igor Grinberg <grinberg@compulab.co.il>
CC: Tom Rini <tom.rini@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Changed the EHCI interface using the ulpi framework.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
For panda initialise the mux pins for ehci usage and
enable ehci in omap4_panda config file.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
usb dpll configuration is done only part of non-essential
dppl configuration however if CONFIG_USB_EHCI_OMAP is defined
we may have to configure usb dpll's for proper functioning
of usb modules. So move the usb dppl configuration to a new func.
and utilise the same during essential dpll configuration.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg <grinberg@compulab.co.il> for reviewing the
omap-ehci patches and suggesting this approach.
[1]: http://www.mail-archive.com/u-boot@lists.denx.de/msg76076.html
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
This patch enable support for SMC911X based ethernet device.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for MMC SPL booting.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
SMDK5250 board is based on Samsungs EXYNOS5250 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4)
architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ
to make it generic for exynos architecture.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: HeungJun, Kim <riverful.kim@samsung.com>
This patch adds support the generic watchdog timer for s5pc1xx and exynos4
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: HeungJun, Kim <riverful.kim@samsung.com>
Since MACH_TYPE_ORIGEN is updated on mach-types,
remove the MACH_TYPE_ORIGEN on config file.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
This patch adds support for Samsung TRATS board
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power.
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch add watchdog.h for Exynos4
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
It is fixed by calculating it as follows:
ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1)
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add TCMPB3 field in pwm structure, earliar this was res1.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
We don't need 3us delay for our i2c bus. Decrease it to 1us.
It would also be possible to use 100ns in the future, but
currently kirkwood has no ndelay implementation.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell
build fails with below error
common/libcommon.o: In function `cread_line':
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_ticks'
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_tbclk'
/home/uboot/src/u-boot-arm/common/main.c:720: undefined reference to `get_ticks'
The same is fixed for Kirkwood, ARMADA100, pantheon and orion5x SoCs
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds support for D-Link DNS-325 ShareCenter NAS.
Signed-off-by: Stefan Herbrechtsmeier <stefan@code.herbrechtsmeier.net>
Cc: prafulla@marvell.com
Cc: albert.u.boot@aribaud.net
The decompressor expects the L2 cache to be disabled. This fixes booting
some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Wolfgang Denk <wd@denx.de>
