Commit Graph

964 Commits

Author SHA1 Message Date
Simon Glass
67ac13b1b9 ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-04 09:04:57 -05:00
Prabhakar Kushwaha
960aa89bda board/common: Add support for QIXIS read/write using i2c
QIXIS FPGA is accessable via both i2c and flash controller.
Only flash controller access is supported.

Add support of i2c based access. It is quite useful in the scenario
where either flash controller path is broken or not present.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:15 -06:00
Prabhakar Kushwaha
41d910118c powerpc/85xx: Add BSC9132QDS support
BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterprise-Femto base station market subsegments.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.

BSC9132QDS Overview
 --------------------
  2Gbyte DDR3 (on board DDR), Dual Ranki
  32Mbyte 16bit NOR flash
  128Mbyte 2K page size NAND Flash
  256 Kbit M24256 I2C EEPROM
  128 Mbit SPI Flash memory
  SD slot
  USB-ULPI
  eTSEC1: Connected to SGMII PHY
  eTSEC2: Connected to SGMII PHY
  PCIe
  CPRI
  SerDes
  I2C RTC
  DUART interface: supports one UARTs up to 115200 bps for console display

Apart from the above it also consists various peripherals to support DSP
functionalities.

This patch adds support for mainly Power side functionalities and peripherals

Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:14 -06:00
Valentin Longchamp
c4d580797d powerpc/p2041: add RCW file for P2041RDB
All the dev boards of Freescale's QorIQ family have a RCW that is
supported by the u-boot.pbl build target. This patch adds one for the
P2041 dev board.

This RCW is suitable for the RAMBOOT_PBL scenarios and was tested on the
P2041RDB booting from the eSPI NOR Flash (P2041RDB_SPIFLASH config).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:12 -06:00
Prabhakar Kushwaha
afa2b72b08 powerpc/t4240qds: Print FPGA detail version
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:12 -06:00
Shaveta Leekha
4457e3e678 powerpc/t4240qds: Add support to dump switch settings on t4240qds board
This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:11 -06:00
Shaveta Leekha
4354889b9b powerpc/b4860qds: Add support to dump switch settings on b4860qds board
This function is called by "qixis_reset switch" command
and switch settings are calculated from FPGA/qixis registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:11 -06:00
Shaveta Leekha
c6cef92f63 powerpc/qixis: enable qixis dump command and add switch dumping command
Remove #ifdef so that "qixis dump" command is always available

Add "qixis_reset switch" command to dump switch settings
Qixis doesn't have 1:1 switch mapping. We need to reverse engineer from
registers to figure out switch settings. Not all bits are available.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:11 -06:00
York Sun
b5b06fb7b0 powerpc/b4860qds: Added Support for B4860QDS
B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.

B4860QDS Overview
------------------
- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
  ECC, 4 GB of memory in two ranks of 2 GB.
- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,  ECC, 2 GB of memory. Single rank.
- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
  16x16 switch VSC3316
- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
  8x8 switch VSC3308
- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
- B4860 UART port is available over USB-to-UART translator USB2SER or over
  RS232 flat cable.
- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper
  connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA
  connector ports 0 and 2 for AMC mode.
- The B4860 configuration may be loaded from nine bits coded reset
  configuration reset source. The RCW source is set by appropriate
  DIP-switches:
- 16-bit NOR Flash / PROMJet
- QIXIS 8-bit NOR Flash Emulator
- 8-bit NAND Flash
- 24-bit SPI Flash
- Long address I2C EEPROM
- Available debug interfaces are:
	- On-board eCWTAP controller with ETH and USB I/F
	- JTAG/COP 16-pin header for any external TAP controller
	- External JTAG source over AMC to support B2B configuration
	- 70-pin Aurora debug connector
- QIXIS (FPGA) logic:
	- 2 KB internal memory space including
- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
  DDRCLK1, 2 and RTCCLK.
- Two 8T49N222A SerDes ref clock devices support two SerDes port clocks
  - total four refclk, including CPRI clock scheme

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:11 -06:00
Prabhakar Kushwaha
2ae4e8d958 board/freescale/common:Add support of QTAG register
QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build date
information.

Add support to parse these fields to have complete FPGA image information.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:10 -06:00
Prabhakar Kushwaha
ac13eb5de0 board/T4240qds:Fix TLB and LAW size of NAND flash
The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.

So Update TLB and LAW size of NAND flash accordingly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:09 -06:00
Timur Tabi
de757a7af0 powerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.c
Static variables should be defined in C files, not header files, because
otherwise every C file that #includes the header file will generate a
duplicate of the variables.  Since the vsc3316_xxx[] arrays are only
used by t4qds.c anyway, just put the variables there.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:08 -06:00
Shaohui Xie
220d506af3 powerpc/p2041: move Lanes mux to board early init
Lanes mux currently is configured in eth.c when initializing FMAN ethernet
ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to
p2041rdb.c which implements a board-specific initialization and will be
called at early stage.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-01-30 11:25:08 -06:00
Kim Phillips
a6187dccd8 Merge remote-tracking branch 'mpc83xx/next' 2013-01-16 18:34:09 -06:00
Fabio Estevam
11d80af487 mx51evk: Add DVI output support
Add DVI output support and make it the default video output.

Currently the CLAA WVGA panel is supported, but this panel has to be purchased
separately, so using the DVI output as the default would allow more people to
try the splash screen feature on a mx51evk.

If someone still wants to use the CLAA WVGA, just set the panel variable as:
set panel claa

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-13 12:06:35 +01:00
Troy Kisky
abbab70363 mx31/mx35/mx51/mx53/mx6: add watchdog
Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-01-13 11:39:57 +01:00
Fabio Estevam
17c5ef2007 mx53loco: Add support for SEIKO 4.3'' WVGA panel
Add support for the Seiko 4.3'' WVGA panel on mx53loco.

By default, the CLAA WVGA panel is selected.

In order to support the Seiko panel, the enviroment variable 'panel' must be
set to 'seiko'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-09 19:22:24 +01:00
Fabio Estevam
085e728aa5 mx53loco: Improve error handling on power_init()
Make the error handling more robust.

Check if each one of the PMIC writes fail and if they do, just return
immediately.

Also, print the cause for the failures.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:07:53 +01:00
Fabio Estevam
d22925108e mx53loco: Remove unneeded 'retval' variable
commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) introduced an extra 'retval' variable, but this is not
necessary since we have already the variable 'ret' in place.

So use 'ret' to store the return values from the pmic related calls and remove
'retval'.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-01-05 18:06:12 +01:00
Shawn Guo
de7d02aeba mx6qsabresd: add usdhc2 and usdhc4 support
The on-board number of available usdhc devices is something board
specific.  The patch moves CONFIG_SYS_FSL_USDHC_NUM out of
mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd
board.

To keep the default mmc device for environment same as before (usdhc3),
it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes
it to 1 for mx6qsabresd.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-05 18:00:14 +01:00
Ashok
e660c44d9e mx35pdk:Use IMX_GPIO_NR macro
Use IMX_GPO_NR macro

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-01-05 17:44:41 +01:00
Fabio Estevam
54bb84115d mx53loco: Call PMIC related functions from board_late_init()
Since commit c733681 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) mx53loco fails to allocate the memory for PMIC:

U-Boot 2013.01-rc2-dirty (Dec 20 2012 - 15:55:01)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
pmic_alloc: No available memory for allocation!
pmic_init: POWER allocation error!
CPU:   Freescale i.MX53 family rev2.0 at 800 MHz
Reset cause: POR
MMC:   FSL_SDHC: 0, FSL_SDHC: 1

Calling the PMIC related functions at a later stage, ie, from board_late_init()
fixes the issue.

Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
2012-12-27 11:03:43 +01:00
Scott Wood
22f4442d12 powerpc/mpc83xx: convert MPC8313ERDB to new-SPL
This converts MPC8313ERDB NAND boot to use the new SPL infrastructure.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-12-19 17:45:54 -06:00
Fabio Estevam
8965112bbf mx53loco: Fix PMIC name
commit c73368150 (pmic: Extend PMIC framework to support multiple instances
of PMIC devices) has incorrectly passed the PMIC name under the FSL PMIC case.

Fix that by passing "FSL_PMIC" as the parameter of pmic_get.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-13 09:22:55 +01:00
Fabio Estevam
cabe240b59 mx25pdk: Adapt it for the new PMIC framework
Make the necessary adaptions for the new PMIC framework, so that mx25pdk can
be built again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-12-11 17:41:19 +01:00
Stefano Babic
05a860c228 Merge branch 'master' of git://git.denx.de/u-boot into master
Conflicts:
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/woodburn_common.h
	board/woodburn/woodburn.c

These boards still use the old old PMIC framework, so they
do not merge properly after the power framework was merged into
mainline.

Fix all conflicts and update woodburn to use Power Framework.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-12-08 12:02:45 +01:00
York Sun
765ad3cf4d powerpc/corenet_ds: Update DDR timing for single-rank DIMMs
Single rank UDIMM timing has been verified with HMT325U7BFR8C-H9 for speed
800, 900, 1000, 1200, 1300MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
Timur Tabi
d31e53b42c powerpc/85xx: add support for the Freescale P5040DS Superhydra reference board
The P5040DS reference board (a.k.a "Superhydra") is an enhanced version of
P3041DS/P5020DS ("Hydra") reference board.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 18:28:06 -06:00
Andy Fleming
e76cd5d4cf 8xxx: Change all 8*xx_DDR addresses to 8xxx
There were a number of shared files that were using
CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and
several variants (DDR2, DDR3). A recent patchset added
85xx-specific ones to code which was used by 86xx systems.
After reviewing places where these constants were used, and
noting that the type definitions of the pointers assigned to
point to those addresses were the same, the cleanest approach
to fixing this problem was to unify the namespace for the
85xx, 83xx, and 86xx DDR address definitions.

This patch does:

s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g

All 85xx, 86xx, and 83xx have been built with this change.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-27 17:45:17 -06:00
Scott Wood
13d1143ffb powerpc/mpc85xx/p2020rdb-pca: Use L2 SRAM for SPL boot
This allows DDR configuration to be deferred to the final U-Boot image,
which is able to make use of SPD data.  The SPL itself cannot use SPD due
to code size constraints.  It previously used fixed register values for
DDR configuration, and those values did not work on the p2020rdb-pca
board I tested with.  It's possible that different revisions of the board
require different settings.  Using SPD eliminates that problem.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:27 -06:00
Scott Wood
d674bccf73 powerpc/mpc85xx/p1_p2_rdb_pc: clean up memory map
- Sort by address, and fix column alignment

- Don't label things as localbus that aren't.  Instead, put chipselect
  info at the end of the description for localbus windows.  Note that
  NAND/NOR have their chipselects swapped when booting from NAND, and CS2
  can be either PMC or VSC7385 depending on hwconfig.

- Shrink NAND to the 32K that's actually mapped in the localbus

- Assign an address and size to L2 SRAM.  Remove the similarly named
  but unintelligible "L2 SDRAM(REV.)".

- Remove the untrue comment about L1 stack being mapped with TLB0.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:26 -06:00
Scott Wood
94a45bb197 powerpc/mpc85xx/p1_p2_rdb_pc: new SPL support
Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:25 -06:00
Tom Rini
178d0cc1a4 Merge branch 'master' of git://git.denx.de/u-boot-video 2012-11-19 09:28:04 -07:00
Benoît Thébaudeau
961a762838 mx35pdk: Add support for OTG
Add support for the OTG port on the mx35pdk Personality board.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
2012-11-16 09:16:45 +01:00
Vikram Narayanan
30ea4be921 mx53loco: Fix build error when CONFIG_VIDEO is disabled
The inclusion of LCD patch into mx53loco breaks the build when
CONFIG_VIDEO is disabled. Fix this by splitting the video
related stuff to a new file.

Also rename the function lcd_iomux to setup_iomux_lcd to make the
namings aligned with the other iomux functions.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 14:05:51 +01:00
Vikram Narayanan
5d71bd210f mx51evk: Fix build error when CONFIG_VIDEO is disabled
The inclusion of LCD patch into mx51evk breaks the build when
CONFIG_VIDEO is disabled. Fix this by splitting the video related
stuff to a new file.

Also rename the function lcd_iomux to setup_iomux_lcd to make the
namings aligned with the other iomux functions.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 14:05:35 +01:00
Łukasz Majewski
c733681507 pmic: Extend PMIC framework to support multiple instances of PMIC devices
The PMIC framework has been extended to support multiple instances of
the variety of devices responsible for power management.
This change allows supporting of e.g. fuel gauge, charger, MUIC (Micro USB
Interface Circuit).
Power related includes have been moved to ./include/power directory.
This is a first of a series of patches - in the future "pmic" will be
replaced with "power".

Two important issues:
1. The PMIC needs to be initialized just after malloc is configured
2. It uses list to hold information about available PMIC devices

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:09 +01:00
Stefano Babic
3e4d27b06d Merge git://git.denx.de/u-boot 2012-11-10 08:05:54 +01:00
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Kim Phillips
a2873bde4c powerpc/mpc83xx: sparse fixes
fdt.c:91:78: warning: Using plain integer as NULL pointer
fdt.c:103:78: warning: Using plain integer as NULL pointer
speed.c:55:11: warning: symbol 'corecnf_tab' was not declared. Should it be static?
speed.c:519:5: warning: symbol 'do_clocks' was not declared. Should it be static?
mpc8313erdb.c:73:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:74:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:75:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:76:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:79:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:80:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:81:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:82:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:85:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:86:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:87:17: warning: obsolete struct initializer, use C99 syntax
mpc8313erdb.c:88:17: warning: obsolete struct initializer, use C99 syntax

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
e56143e54f powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Jason Jin
f9a2d79337 ColdFire: Update the lds file for M54418TWR board.
The M54418TWR lds file  need to update since commit:

8b493a5236

common: Discard the __u_boot_cmd section

The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-29 22:08:09 +08:00
Albert ARIBAUD
f04821a8ca Merge remote-tracking branch 'u-boot-imx/master' 2012-10-27 11:43:17 +02:00
Fabio Estevam
e00c89df06 mx25pdk: Add Ethernet support
mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
af2a4093cb mx25pdk: Add esdhc support
mx25pdk has a SD/MMC slot connected to esdhc1.

Add support for it and allow the environment variables to be saved into SD/MMC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Stefano Babic
b736e4b929 ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it
conform to start.S  in armv7 architecture, to make it
usable if the SPL framework is used.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Alison Wang
186fc4db26 ColdFire: Add Freescale MCF54418TWR ColdFire development board support
Add Freescale MCF54418TWR ColdFire development board support.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Tom Rini
c7656bab41 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2012-10-22 16:54:38 -07:00
York Sun
ee52b188ca powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.

SERDES Connections
  32 lanes grouped into four 8-lane banks
  Two “front side” banks dedicated to Ethernet
  Two “back side” banks dedicated to other protocols
DDR Controllers
  Three independant 64-bit DDR3 controllers
  Supports rates up to 2133 MHz data-rate
  Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA

Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.

Detail information can be found in doc/README.t4qds

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Shaveta Leekha
aa42cb71fa board/freescale/common: VSC3316/VSC3308 initialization code
Add code for configuring VSC3316/3308 crosspoint switches
Add README to understand the APIs

   - VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch
     capable of data rates upto 11.5Gbps. VSC3316 has 16 input and 16
     output ports whereas VSC3308 has 8 input and 8 output ports.
     Programming of these devices are performed by two-wire or four-wire
     serial interface.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:21 -05:00