Commit Graph

39259 Commits

Author SHA1 Message Date
Tim Harvey
0a22c7f0dc imx: ventana: enable splashscreen support
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-09-06 18:22:48 +02:00
Soeren Moch
8ce747fcff board: tbs2910: fix HDMI pre-console buffer
HDMI output must be enabled very early to also enable the pre-console buffer

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2016-09-06 18:22:48 +02:00
Soeren Moch
8741a374f5 board: tbs2910: always enable usbkbd
'usb start' is much faster now, so always enable usb keyboard

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2016-09-06 18:22:48 +02:00
Peter Chubb
b615267633 ARM: tegra: Add support for TK1-SOM board from Colorado Engineering
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-01 09:24:30 -07:00
Stephen Warren
7932d3e4a7 ARM: tegra: use numeric versioning for p2771-0000
The board ID EEPROM and board ID stickers on p2771-0000 will use a numeric
versioning scheme, with version numbers such as 000/100/200/300/400/500.
Within NVIDIA, these versions are also known as A00/A01/A02/A03/A04/B00.
However, that numbering scheme is not easily visible outside of NVIDIA,
and so does not make much sense to use. Convert U-Boot to use the readily
visible numeric scheme.

Also, it turns out that the current A02 DT actually applies to board
versions 000/100/200 (A00..A02). Consequently rename this to 000 not 200
so that all U-Boot builds are named after the first version of the HW they
support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-30 11:14:53 -07:00
Bin Meng
cb1cbdd969 x86: qemu: efi: Add two boards for EFI 32-bit and 64-bit payload
This introduces two board defconfig files for generating EFI 32-bit
and 64-bit payloads, to run on QEMU x86 target.

With these in place, hopefully buildman will catch any build error
with EFI payload support on x86.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-30 09:26:05 +08:00
Bin Meng
3e6cc35f4e x86: efi: Fix EFI 64-bit payload build warnings
There are lots of warnings when building EFI 64-bit payload.

include/asm-generic/bitops/__fls.h:17:2:
  warning: left shift count >= width of type
  	if (!(word & (~0ul << 32))) {
			^

In fact, U-Boot itself as EFI payload is running in 32-bit mode.
So BITS_PER_LONG needs to still be 32, but EFI status codes are
64-bit when booting from 64-bit EFI. Introduce EFI_BITS_PER_LONG
to bridge those status codes with U-Boot's BITS_PER_LONG.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-30 09:26:05 +08:00
Bin Meng
3dc51ab0e1 x86: efi: payload: Make EFI payload build again
Since commit 73c5c39 "Makefile: Drop unnecessary -dtb suffixes",
EFI payload does not build anymore. This fixes the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-30 09:26:05 +08:00
Simon Glass
4cc00f0611 x86: Add debugging when cpu_common_init() fails
Add a debug() at this point to help figure out what is wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-30 09:26:05 +08:00
Simon Glass
e6294e0579 x86: ivybridge: Allow microcode to be collated
Generally the microcode is combined into a single block only (and removed
from the device tree) when there are multiple blocks. But this is not a
requirement.

Adjust the ivybridge code to avoid assuming this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-30 09:26:05 +08:00
Simon Glass
fda4fa8195 x86: Add debugging when a microcode update fails
Add a debug() at this point to help figure out what is wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-30 09:26:05 +08:00
Tom Rini
ff62bdfbd5 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-08-28 10:36:20 -04:00
Masahiro Yamada
8d11f80413 ARM: uniphier: enable CONFIG_CMD_CACHE
This will be useful, for example, to load firmware to DRAM and make
it visible to other agents.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:12:18 +09:00
Masahiro Yamada
85dc2fe119 ARM: uniphier: change UNIPHIER_SERIAL to default y option
This is very likely to be necessary for normal use cases.
Set its default to 'y' for shorter defconfig files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:35 +09:00
Masahiro Yamada
f0633533d5 ARM: dts: uniphier: add u-boot, dm-pre-reloc to use eMMC boot on sLD3
The eMMC on sLD3 is assigned with dedicated pins (only multiplexed
with GPIO), so it shouldn't hurt to enable eMMC on SPL all the time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:34 +09:00
Masahiro Yamada
e8811fc06c ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN for sLD3
Commit 76c52ce29f ("ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN
to bind all nodes") missed to increase this config for sLD3.

This change is needed to add "u-boot,dm-pre-reloc" to some nodes;
more devices are bound, more malloc memory is needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:34 +09:00
Masahiro Yamada
499c8679be ARM: uniphier: display revision of Micro Support Card 3.6.x kindly
The revision of the original support card (rev 3.5, rev 3.6) fits in
the 8 bit width revision register.  When it was extended in a weird
way, it was versioned in the format of "3.6.x" (where it should have
been "3.7", of course).  What is worse, only the sub-level version
"6.x" was recorded in the 8 bit width register, completely ignoring
the compatibility of the revision register format.

This patch saves madly-versioned support cards by assuming the major
version "3" when the MSB 4 bit of the register is read as "6".  With
this, the support card revision that were displayed as "6.10" is now
corrected to "3.6.10".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:11:31 +09:00
Masahiro Yamada
928f3248b3 ARM: uniphier: support system reset functionality for PSCI
This supports the system reset via PSCI for ARMv7 SoCs.

Because the system reset is not supported on PSCI 0.1, let's define
CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there
is no CONFIG to enable it in U-Boot for now.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 13:09:19 +09:00
Masahiro Yamada
4a89a24e26 mmc: uniphier-sd: just return if already set to desired clock rate
With this, we can save unnecessary udelay().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:51 +09:00
Masahiro Yamada
8be12e2839 mmc: uniphier-sd: return error code if unsupported width is given
With the CONFIG_DM_MMC_OPS migration, the .set_ios callback can
return an integer now.  Return an appropriate error value rather
than sudden death by BUG().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:49 +09:00
Masahiro Yamada
4eb008460c mmc: uniphier-sd: move uniphier_sd_init() below
No more reason to define this function above the ops structure.
Move it near the caller.  Also, change its return type to void
because it never fails.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:48 +09:00
Masahiro Yamada
3937404f8b mmc: uniphier-sd: migrate to CONFIG_DM_MMC_OPS
Catch up with the DM migration.

As struct dm_mmc_ops does not have .init callback, call the init
function directly from the probe function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:47 +09:00
Masahiro Yamada
4a70d26223 mmc: uniphier-sd: add static qualifiers to probe and remove callbacks
They are both only referenced in this file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28 12:39:46 +09:00
Tom Rini
b89dfcfd92 Merge git://git.denx.de/u-boot-rockchip 2016-08-27 15:22:30 -04:00
Kever Yang
bc2f8a5406 rockchip: rk3399: update MAINTAINER file
This patch add maintainer information for rk3399 evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2016-08-27 08:48:23 -06:00
Tom Rini
c6b968da78 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-08-26 17:05:01 -04:00
Tony Lindgren
1cfce74fe5 nand: Fix set_dev checks for no device
If we do nand device 0 command in u-boot on a device that has NAND support
enabled but no NAND chip, we can get data abort at least on omaps.

Fix the issue by replacing the check with nand_info[dev] as
suggested by Scott Wood. The check for name existed before because before
the array-to-pointer conversion there was no way to directly test
nand_info[dev] for emptiness.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-08-26 17:04:58 -04:00
Masahiro Yamada
c21fc7e223 treewide: fix "followings" to "following"
Most of them are my mistakes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-26 17:04:58 -04:00
Masahiro Yamada
88e1346e35 tools: moveconfig: add Xtensa GCC prefix to CROSS_COMPILE list
This is needed to move CONFIG options for the recently-added
xtfpga_defconfig.

The tarball of the pre-built toolchain can be downloaded from:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-26 17:04:57 -04:00
Stefan Agner
8f894a4d38 arm: cache: always flush cache line size for page table
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-08-26 17:04:56 -04:00
Stefan Agner
c5b3cabf4a arm: cache: add support for LPAE for region D$ behavior
Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-08-26 17:04:56 -04:00
Tom Rini
e009bfa4f9 arch/arm/Kconfig: Whitespace correction
Use a tab not 8 spaces.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-26 17:04:55 -04:00
Tom Rini
067716bac5 ARM: Move SYS_CACHELINE_SIZE over to Kconfig
This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
cases we are mirroring the values used by the Linux Kernel here.  Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Stefan Roese <sr@denx.de>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: "Pali Rohár" <pali.rohar@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Alison Wang <b18965@freescale.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Saksham Jain <saksham.jain@nxp.com>
Cc: Qianyu Gong <qianyu.gong@nxp.com>
Cc: Wang Dongsheng <dongsheng.wang@nxp.com>
Cc: Alex Porosanu <alexandru.porosanu@freescale.com>
Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
Cc: tang yuantian <Yuantian.Tang@freescale.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Josh Wu <josh.wu@atmel.com>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christophe Ricard <christophe-h.ricard@st.com>
Cc: Anand Moon <linux.amoon@gmail.com>
Cc: Beniamino Galvani <b.galvani@gmail.com>
Cc: Carlo Caione <carlo@endlessm.com>
Cc: huang lin <hl@rock-chips.com>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Cc: Xu Ziyuan <xzy.xu@rock-chips.com>
Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com>
Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ben Whitten <ben.whitten@gmail.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: "Andrew F. Davis" <afd@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Carlos Hernandez <ceh@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ash Charles <ashcharles@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Daniel Allred <d-allred@ti.com>
Cc: Gong Qianyu <Qianyu.Gong@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Chin Liang See <clsee@altera.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
2016-08-26 17:04:46 -04:00
Jens Kuske
d5ac6eef91 sunxi: Tune H3 DRAM PLL to improve lock time
The H3 PLL5 used for DRAM barely manages to lock to the required
frequency before DRAM controller starts, sometimes leading to wrong
delay-line calibration results.
This patch changes the PLL tuning parameters to the same values as
boot0 used, which speeds up the locking and fixes the problem.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-08-26 16:58:37 +02:00
Hans de Goede
421c98d7d2 sunxi: display: Use PWM to drive backlight where applicable
When the backlight's pwm input is connected to a pwm output of the SoC,
actually use pwm to drive the backlight.

The mean reason for doing this is to fix the backlight turning off
for aprox. 1 second while the kernel is booting. This is caused by
the kernel actually using pwm to drive the backlight, so that it
can dim the backlight. First the pwm driver loads and switches the
pinmux for the pin driving the backlight's pwm input to the pwm
controller. Then about 1s later the actual backlight driver loads
and tells the pwm driver to actually update the pwm settings, which
have a power-on-reset value of "off".

An additional advantage is that this allows us to initatiate the
backlight at 80%, which is the kernel default, avoiding a brightness
change while the kernel loads.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed by: Peter Korsgaard <peter@korsgaard.com>
2016-08-26 16:58:37 +02:00
Hans de Goede
8d463c5a32 sun5i: Add defconfig and dts file for the Empire Electronix M712 tablet
Add a defconfig and dts file for the Empire Electronix M712 tablet, this
is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.

The dts file is identical to the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-08-26 16:58:36 +02:00
Hans de Goede
860fbdd41f sunxi: Sync dts files with upstream kernel
Sync dts files with the current (Aug 18th 2016) state of Maxime's
linux/sunxi/for-next repo.

Note this commit also updates configs/MSI_Primo81_defconfig,
adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
because the tablet does not have a reachable uart so the dts sync
drops its serial0 alias.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-08-26 16:58:36 +02:00
Hans de Goede
a1243f7851 sun6i: Add defconfig and dts file for tablets using the inet-q972 PCB
Add a defconfig and dts file for tablets using the generic inet-q972 PCB.

Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.

This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.

The dts files are identical to the ones submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-08-26 16:58:36 +02:00
Tom Rini
da968c7bfa Merge branch 'master' of git://git.denx.de/u-boot-i2c 2016-08-26 07:42:06 -04:00
Tom Rini
c733c18e35 Merge branch 'master' of git://www.denx.de/git/u-boot-marvell 2016-08-26 07:41:54 -04:00
Simon Baatz
bdf58c73ca tools: kwboot: patch destaddr only for SoCs with header version 1
Commit f4db6c976c ("arm: mvebu: Add runtime detection of UART (xmodem)
boot-mode") added a change to hdr->destaddr when dynamically patching an
image for UART boot mode.  With this change, kwboot ceases to work on
Kirkwood.

Thus, let's change hdr->destaddr only when we are patching an image with
header version 1 (Orion and Kirkwood use header version 0).

Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Fixes: f4db6c976c ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode")
Cc: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:42:50 +02:00
Chris Packham
c90d7ab6b0 arm: mvebu: a38x: typo fix cpabilities -> capbilities
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:52 +02:00
Chris Packham
014a357bba arm: mvebu: a38x: update serdes error handling
Ensure appropriate error messages are generated. Previously all errors
indicated that the serdes was already in use. Now appropriate error
messages are given.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:44 +02:00
Chris Packham
148f00e7a7 spl: Remove unused CONFIG_SPL_SPI_* definitions
As of commit 88e34e5 ("spl: replace CONFIG_SPL_SPI_* with
CONFIG_SF_DEFAULT_*") these defines are not used. Remove them to avoid
confusion.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:34 +02:00
Chris Packham
d7b4731efd arm: mvebu: Add support for NAND interface on A-38x
The NAND interface on the Armada-38x series is similar to that on the
Armada-XP. The key difference is that the NAND ECC clock ratio is
provided via the DFX Server registers instead of the Core Clock.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-08-26 08:33:21 +02:00
Stefan Roese
03d6cd972e i2c: mvtwsi: Fix order of address bytes (high to low)
Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally
inverted the sequence of address bytes sent to the I2C device. This
patch corrects this by sending the highest byte first and the lowest
byte last again.

Tested on theadorable Armada-XP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
2016-08-26 07:02:49 +02:00
Stephen Warren
4832c7f5f7 spi: tegra: fix hang in set_mode()
In tegra20_slink.c, the set_mode() function may be executed before the
SPI bus is claimed the first time, and hence the clocks to the SPI
controller may not be running. If so, any register read/write at this
time will hang the CPU. Fix this by ensuring the clock is running as soon
as the driver is probed. This is observed on the Tegra30 Beaver board.

Apply the same clock initialization fix to all other Tegra SPI drivers so
that if set_mode() is ever implemented there, the same bug will not appear.
Note that tegra114_spi.c already operates in this fashion.

The clock manipulation code is copied from claim_bus() to probe() rather
than moved. This ensures that any calls to set_speed() take effect; the
clock can't be set once during probe and left unchanged.

Fixes: 5cb1b7b395 ("spi: tegra20: Add support for mode selection")
Cc: Mirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 15:35:03 -07:00
Stephen Warren
6002c75c59 ARM: tegra: remove stale nvidia, bpmp I2C DT property
The nvidia,bpmp property is left over from an old BPMP I2C binding, and
shouldn't be present. Remove it from the SoC DT file, and update the
I2C driver not to parse it; the value wasn't used for anything any more
anyway.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:48:11 -07:00
Stephen Warren
eb3f68afbc ARM: tegra: fix Tegra186 SDHCI clock/reset names
The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI
clock be "sdhci" not "sdmmc", and that the clock is accessed by index
rather than by name. Fix the Tegra186 DT and MMC driver to honor this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:47:49 -07:00
Stephen Warren
b4ee081e5a ARM: tegra: fix Tegra186 I2C clock name
The Tegra I2C binding dictates that the clock name for the Tegra I2C clock
be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 13:47:49 -07:00