Based on the register / dram_para headers from the Allwinner u-boot / linux
sources + the init sequences from boot0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Explicitly turn off unused voltages, rather then leaving them as is. Likewise
explictly enabled the dcdc convertors, rather then assuming they are already
enabled at boot.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The axp223 appears to be the same as the axp221, except that it uses the
rsb to communicate rather then the p2wi. At least all the registers we use
are 100% the same.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
For sun6i the SID is stored in the pmic, rather then in the SoC itself,
add a function to retreive the sid.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
CONFIG_DISPLAY_CPUINFO is already defined in x86-common.h, so remove
it to avoid duplication.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link
which is currently the only real board officially supported to run
U-Boot loaded by coreboot.
Note the symbolic link file chromebook_link.dts is deleted and
link.dts is renamed to chromebook_link.dts.
To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86
define needs to be moved to arch/x86/cpu/ivybridge/Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Since we already swtiched to use the new mechanism for building
U-Boot for coreboot, coreboot.h is no longer needed so remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that
we don't need them in the board configuration file thus the same
board configuratoin file can be used to build both coreboot version
and bare version.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
There are many places in the U-Boot source tree which refer to
CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT
that is currently defined in coreboot.h.
Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch
to board configuration file to build U-Boot later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit adds several APIs to decode PCI device node according to
the Open Firmware PCI bus bindings, including:
- fdtdec_get_pci_addr() for encoded pci address
- fdtdec_get_pci_vendev() for vendor id and device id
- fdtdec_get_pci_bdf() for pci device bdf triplet
- fdtdec_get_pci_bar32() for pci device register bar
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
Introduce a gd->hose to save the pci hose in the early phase so that
apis in drivers/pci/pci.c can be used before relocation. Architecture
codes need assign a valid gd->hose in the early phase.
Some variables are declared as static so change them to be either
stack variable or global data member so that they can be used before
relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which
just affects some print format.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Convert Extreme Engineering Solutions products to use generic board
support.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
When CONFIG_TRACE is disabled, linking fails with:
common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init'
To fix, wrap trace init calls with #ifdef CONFIG_TRACE.
While at it, remove the static inline version of the init call from
trace.h as suggested by Simon Glass, since it doesnt work.
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Boot from SD-card (and probably also from NAND) was broken since
commit d6d07a9bec ("arm: vf610: add NAND support for vf610twr").
It looks like the increased size of U-Boot lead to a situation
where the boot ROM overwrote its own stack/heap while loading
U-Boot from the SD-card to the SRAM. However, U-Boot worked fine
when loaded through USB serial loader directly into SRAM. It
looks like loading from SD-card uses other stack/heap location
then the serial loader (or maybe no stack or heap at all).
This fix moves U-Boot to gfxRAM, which is 512kB in size and is not
used by the boot ROM nor the SD-card loader of it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
In order to count the time, add CONFIG_CMD_TIME.
Using AHB read can improve the the read speed about 30%.
AHB read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.174 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.174 seconds
IP read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.227 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.227 seconds
Note:
Quad read is not supported in driver, now. In my side, using AHB and Quad read
can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
DTB and DM, then make the code cleaner and more feature can be added.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
mx6sxsabresd revb board uses 32MB qspi flash, reva board uses 16MB qspi
flash. Currently, the default supported platform is revb board.
If want to configure for reva board, just define CONFIG_MX6SX_SABRESD_REVA
in mx6sxsabresd.h to support reva qspi flashes whose size is 16MB.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This fixes us never programming ALDO2, and programming the ALDO2 voltage
into ALDo1.
Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
