Commit Graph

32406 Commits

Author SHA1 Message Date
Simon Glass
07470d6f5b tpm: Convert drivers to use SPDX
Add an SPDX header to two drivers that don't have it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:27 -06:00
Simon Glass
26468d5186 tpm: Convert board config TPM options to Kconfig
Convert all TPM options to Kconfig and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:27 -06:00
Simon Glass
a7d660bc49 tpm: Add Kconfig options for TPMs
Add new Kconfig options for TPMs in preparation for moving boards to use
Kconfig for TPM configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:27 -06:00
Simon Glass
afc84dec1c tpm: Drop two unused options
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.

Remove them from the README and board config to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:27 -06:00
Simon Glass
3a3f8e946b tpm: Remove old pre-driver-model I2C code
This is not used anymore by any board so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:27 -06:00
Misha Komarovskiy
057d2f4973 exynos: Rise ARM voltage to 1.1V for chained bootloaders
If board uses downstream Chrome OS U-Boot as first stage
bootloader and upstream version is chained second stage,
1.1V is minimum voltage borderline.

Signed-off-by: Misha Komarovskiy <zombah@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:27 -06:00
Simon Glass
d9917b0b6c buildman: Correct 'Series-cover-cc' detection logic
This requires 'Series-cover_cc' at present which is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:26 -06:00
Bin Meng
e0bb89b14b drivers: kconfig: Sort driver menu in alphabetical order
Sort different types of drivers in alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:26 -06:00
Bin Meng
99385b6b67 drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu
Right now PHYS_TO_BUS shows in the Kconfig main menu, move it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:26 -06:00
Bin Meng
776d2ef06b drivers: kconfig: Move "Generic Driver Options" menu to the top
Make "Generic Driver Options" menu show on the top in the Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:26 -06:00
Marek Vasut
628d792c07 dm: core: Add Kconfig for simple bus driver
Add Kconfig entries for the simple-bus driver, both for U-Boot
and for SPL. The simple-bus is enabled by default in U-Boot and
disabled by default in SPL to preserve the original behavior.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Modified to fit on top of Masahiro's $(SPL) setup:
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:26 -06:00
Simon Glass
4e9838c102 dm: Use dev_get_addr() where possible
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-08-31 07:57:26 -06:00
Masahiro Yamada
71f1e3f19d dm: simplify uclass_foreach_dev() implementation
This can be simply written with list_for_each_entry(), maybe
this macro was not necessary in the first place.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:56:44 -06:00
Masahiro Yamada
f875bbb491 ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.

Import from Linux with some adjustments:
  - Use SPDX-License-Identifier
  - Add clock-frequency to serial nodes
  - Drop unusable nodes from -ref.dts

While I am here, sort Makefile entries alphabetically.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:23 +09:00
Masahiro Yamada
10ee0a68d8 ARM: dts: uniphier: add PH1-Pro5 SoC support
Initial version of UniPhier PH1-Pro5 device tree.

(Imported from Linux with adjustment for SPDX License Identifier)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:15 +09:00
Masahiro Yamada
d243c186e5 ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux.  It eventually
adds pinctrl-related nodes and properties.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-31 00:29:11 +09:00
Masahiro Yamada
6d99cfaee8 serial: uniphier: drop platform data support
This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now
selects OF_CONTROL and SPL_OF_CONTROL.

This driver no longer needs to support platform data configuration.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-31 00:28:46 +09:00
Masahiro Yamada
f4e190e317 ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now
available for SPL too.

This is the state-of-the-art implementation in U-boot.

The board files (platform data) are no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-31 00:25:06 +09:00
Masahiro Yamada
9271614eb3 ARM: uniphier: select SPL_DM rather than default in defconfig
Now UniPhier SoCs highly depend on Driver Model for SPL, too.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:20:20 +09:00
Masahiro Yamada
de09faab4e ARM: uniphier: remove unused macro
This macro is not referenced at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:19:28 +09:00
Masahiro Yamada
94bd3699ee ARM: uniphier: fix build error when CONFIG_DEBUG_LL is defined
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3
are both enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:19:00 +09:00
Masahiro Yamada
2bc1f2b592 mtd: denali_spl: do not allocate page_buffer in .bss section
Since commit 2580a2a7e7 ("mtd: nand: Increase max sizes of OOB and
Page size"), three boards (ph1_ld4, ph1_pro4, ph1_sld8) fail to build
with the following error message:
  arm-linux-gnueabi-ld.bfd: SPL image plus BSS too big

They compile drivers/mtd/nand/denali_spl.c and it has a page_buffer
as static data:

    static uint8_t page_buffer[NAND_MAX_PAGESIZE];

This buffer required 8KB in .bss section before that commit and now
it has been increased to 16KB.  Given limited code/memory size for SPL,
it is not a good idea to allocate a page buffer statically.  In the
first place, the load address 'dst' can be used as a page buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:18:00 +09:00
Tom Rini
a679cc0118 tools/atmelimage.c: Fix warning when debug is enabled
Otherwise we get:
tools/atmelimage.c:134:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 2 has type ‘size_t’ [-Wformat=]
debug("atmelimage: interrupt vector #%d is 0x%08X\n", pos+1,
^

Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-28 14:01:11 -04:00
Kishon Vijay Abraham I
504de98a3b ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()
Now that we have separate function to enable USB clocks, remove
enabling USB clocks from enable_basic_clocks(). Now board_usb_init()
should take care to invoke enable_usb_clocks() for enabling
USB clocks.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:22 -04:00
Kishon Vijay Abraham I
6f1af1e358 board: ti: invoke clock API to enable and disable clocks
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:22 -04:00
Kishon Vijay Abraham I
09cc14f4bc ARM: AM43xx: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.

Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
ca5a0f172e ARM: OMAP5: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and  USB exit respectively.

Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
7ba792c044 board: ti: OMAP5: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in omap5 board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:21 -04:00
Kishon Vijay Abraham I
7c379aaa03 board: ti: beagle_x15: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in beagle_x15 board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Kishon Vijay Abraham I
bf0385d7f0 include: configs: am43xx_evm: add 'usb stop' in usbboot env
The usbboot environment variable has 'usb start' command but
doesn't have the corresponding 'usb stop' command. This breaks
usb peripheral mode if tried after 'run usbboot' fails to load
the images in usb host mode.

Fix it here by adding 'usb stop' command in usbboot env.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Kishon Vijay Abraham I
03c128c949 board: ti: remove duplicate initialization of vbus_id_status
vbus_id_status is initialized in board_usb_init. So remove it
while creating dwc3_device objects.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Kishon Vijay Abraham I
0a7ab045b9 TI PHY: Add support to control 2nd USB PHY in DRA7xx/AM57xx
Added support to power on/power off the second USB PHY present in
DRA7xx and AM57xx.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Kishon Vijay Abraham I
7beaf8b690 ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2
Enabled clocks for the second dwc3 controller and second USB PHY present in
DRA7.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:19 -04:00
Kishon Vijay Abraham I
8af1be7678 usb: dwc3: dwc3-omap: Use the clear register inorder to clear the interrupts
Writing "0x00" to the USBOTGSS_IRQENABLE_SET_MISC and
USBOTGSS_IRQENABLE_SET_0 doesn't disable the interrupts. Used
USBOTGSS_IRQENABLE_CLR_MISC and USBOTGSS_IRQENABLE_CLR_0 instead.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:19 -04:00
Andreas Bießmann
2d9efa1227 Makefile: fix SOURCE_DATE_EPOCH for *BSD host
The SOURCE_DATE_EPOCH mechanism for reproducible builds require some date(1)
with -d switch to print the relevant date and time strings of another point of
time.

In other words it requires some date(1) that behaves like the GNU date(1) [1].
The BSD date(1) [2] on the other hand has the same switch but with a different
meaning.

Respect this and check the date(1) abilities before usage, error on non
working version.  Use the well known pre- and suffixes for the GNU variant of
a tool on *BSD hosts to search for a working date(1) version.

[1] http://man7.org/linux/man-pages/man1/date.1.html [2]
http://www.freebsd.org/cgi/man.cgi?query=date

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-08-28 12:33:19 -04:00
Andreas Bießmann
9316412f46 picosam9g45: adopt CONFIG_SYS_PROMPT
Commit 181bd9dc61 introduced Kconfig selection
for SYS_PROMPT. When applying the new picosam9g45 board this change slipped
through, adopt it.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-08-28 12:33:18 -04:00
Andreas Bießmann
610751e94f at91sam9260ek: add missing files to MAINTAINERS
This fixes the following genboardscfg.py warnings:

---8<---
WARNING: no status for 'at91sam9g20ek_2mmc'
WARNING: no maintainers for 'at91sam9g20ek_2mmc'
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-08-28 12:33:18 -04:00
Andreas Bießmann
7751604ca9 at91sam9rlek: add missing files to MAINTAINERS
This fixes following genboardscfg.py warning:

---8<---
WARNING: no status for 'at91sam9rlek_mmc'
WARNING: no maintainers for 'at91sam9rlek_mmc'
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-08-28 12:33:18 -04:00
Paul Kocialkowski
8ceb34a1d1 omap-common: SYS_BOOT fallback logic correction and support for more devices
The SYS_BOOT-based fallback shouldn't only check for one of the conditions of
use and then let the switch/case handle each boot device without enforcing the
conditions for each type of boot device again.

For instance, this behaviour would trigger the fallback for UART when
BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should
be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not
CONFIG_SPL_USB_SUPPORT.
Separating the logic for USB and UART solves this.

In addition, this adds support for more peripheral devices (USBETH and CPGMAC)
to the fallback mechanism. Note that the USBETH boot device should always be
different from the USB boot device (each should match a different bootrom
handoff case).

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2015-08-28 12:33:18 -04:00
Marcel Ziswiler
4519668b29 mtd/nand/ubi: assortment of alignment fixes
Various U-Boot adoptions/extensions to MTD/NAND/UBI did not take buffer
alignment into account which led to failures of the following form:

ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Scott Wood <scottwood@freescale.com>
[trini: Add __UBOOT__ hunk to lib/zlib/zutil.c due to malloc.h in common.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:17 -04:00
Stefan Roese
285e266b41 arm: spear: Some changes / updates to the x600 config header
This patch brings the following changes to the x600 board support:

- Add USB EHCI support
- Add VFAT support for USB key file access
- Increase malloc size (for UBI / UBIFS usage)
- Enable Thumb mode to save some image space
- Remove unreferenced CONFIG_STACKSIZE
- Remove unreferenced CONFIG_SPL_NO_PRINTF

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:17 -04:00
Stefan Roese
f49cc22f5c arm: spear: Enable caches on SPEAr
The designware ethernet driver supports d-cache now. So there is nothing
stopping us now to enable the caches completely on SPEAr.

Tested on SPEAr600 x600 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:17 -04:00
Stefan Roese
2fbdbda1c7 arm: spear: Move to common SPL infrastructure
The SPL implementation for SPEAr600 is older than the common SPL
infrastructure. This patch now moves the SPEAr600 SPL over to the
common SPL code.

Tested on the only SPEAr board that currently uses SPL in mainline
U-Boot, the x600.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:16 -04:00
Stefan Roese
80999a5277 arm: spear: Fix booting - relocate vector table to 0 (low-vector)
Booting SPEAr600 eval board doesn't work with current mainline U-Boot. With
this patch the low-vector bit is left to '0'. Resulting in the common
relocation of the vectors to 0 (SDRAM) to work correctly.

Tested on the SPEAr600 EVB.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
2015-08-28 12:33:16 -04:00
Lokesh Vutla
76b3f195e9 ARM: k2l: Fix device speeds
ARM supported speeds and init value of core_pll for SDP1200
are programmed wrong as part for the device speed cleanups.
Fixing it here.
Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue

Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection")
Tested-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:16 -04:00
Lokesh Vutla
be8ce70c02 ARM: keystone2: Update README
Update README to include uart boot mode support and makefile
changes.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Lokesh Vutla
45fe4b4035 ARM: keystone2: Build MLO by default
MLO(NAND/MMC boot image), is used for all the ks2 platforms.
Enabling it in config.mk so that these images will be automatically
built upon calling make. u-boot-spi.gph is already the build target,
so not including here.

Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Lokesh Vutla
5f586e9fa1 ARM: keystone2: Rename u-boot-nand.gph to MLO
NAND boot mode, ROM expects an image with a gp header in the
beginning and an 8bytes filled with zeros at the end. The same is
true for SD boot on K2G platforms but the file name should be MLO.

Renaming u-boot-nand.gph to MLO, so that same image can be used for
NAND and SD boots. And also not including all the u-boot only images
under CONFIG_SPL_BUILD.

Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Nishanth Menon
cd43ddc019 ARM: keystone2: move the custom build rules out to keystone specific makefile
Keystone has build rules introduced by commit ef509b9063 ("k2hk: add
support for k2hk SOC and EVM") and commit 0e7f2dbac6 ("keystone: add
support for NAND gpheader image").

These are not reused by other platforms for the build, hence there is no
clear benefit is maintaining them in the generic makefile as a build
target. move these to the keystone specific make option

Original idea of using config.mk by Lokesh Vutla <lokeshvutla@ti.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:15 -04:00
Lokesh Vutla
401f2d91ac ARM: keystone2: configs: Move SP to end of u-boot section
Currently u-boot stack is defined at the beginning of MSMC RAM.
This is a problem for uart boot mode as ROM downloads directly to
starting of MSMC RAM.
Fixing it by moving stack to the end of u-boot section and shifting
SYS_TEXT_BASE to the start of MSMC RAM.
Updated division of MSMC RAM is shown below:
	-----------------------------------------
	|		|	|		|
	| U-Boot text	|U-Boot	| SPL text	|
	| download	| Stack	| Download +	|
	|		|	| SPL_BSS +	|
	|		|	| SPL_STACK	|
	-----------------------------------------
	[1]		[2]	[3]		[4]

[1] SYS_TEXT_BASE (Start of MSMC RAM)
[2] SPL_TEXT_BASE - GBL_DATA_SIZE
[3] SPL_TEXT_BASE
[4] END of SPL

[1] + [2] is at least 1M on all platforms, so no chance of overlap.

Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-28 12:33:14 -04:00