Commit Graph

61 Commits

Author SHA1 Message Date
Lokesh Vutla
94069301ba ARM: keystone2: Cleanup init_pll definition
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:53 -04:00
Lokesh Vutla
74af583e9f ARM: keystone2: Use common structure for PLLs
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:53 -04:00
Lokesh Vutla
7b50e1599f ARM: keystone2: Fix dev and arm speed detection
Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:52 -04:00
Lokesh Vutla
c321a23624 ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:52 -04:00
Lokesh Vutla
aeabe652bb ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:51 -04:00
Lokesh Vutla
cfe5f0cda0 ARM: keystone2: Cleanup SoC detection
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:51 -04:00
Vitaly Andrianov
17c5bda2a9 keystone2: add wfi in to the core_spin loop
When core A turning of core B, via tetris DPSC it places the core
B DPSC into transitional state. The core B has to execute wfi instruction
to move its DPSC to the OFF state. This patch add such instruction.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:01:57 -04:00
Vitaly Andrianov
437a7293a7 keystone2: use correct EFUSE_BOOTROM fileds to configure speed
The get_max_arm_speed() and get_max_dev_speed() used wrong register
fields to get the maximum speeds. This commit fixes the bug.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-19 16:46:46 -04:00
Joe Hershberger
a26cd04920 arch: Make board selection choices optional
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>
2015-05-12 18:10:02 -04:00
Masahiro Yamada
dc7de222aa ARM: keystone: move SoC headers to mach-keystone/include/mach
Move arch/arm/include/asm/arch-keystone/*
  -> arch/arm/mach-keystone/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
2015-02-21 08:23:52 -05:00
Masahiro Yamada
39a723452f ARM: keystone: move SoC sources to mach-keystone
Move
arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
2015-02-21 08:23:52 -05:00