brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

ARM: keystone2: Cleanup init_pll definition

Browse Source 
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2015-07-28 14:16:46 +05:30 committed by Tom Rini
parent 74af583e9f
commit 94069301ba
5 changed files with 84 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/mach-keystone/clock.c
View File

@ -211,12 +211,16 @@ void init_pll(const struct pll_init_data *data)
sdelay(210000);
}
void init_plls(int num_pll, struct pll_init_data *config)
void init_plls(void)
{
int i;
struct pll_init_data *data;
int pll;
for (i = 0; i < num_pll; i++)
init_pll(&config[i]);
for (pll = MAIN_PLL; pll < MAX_PLL_COUNT; pll++) {
data = get_pll_init_data(pll);
if (data)
init_pll(data);
}
}
static int get_max_speed(u32 val, u32 speed_supported)

3
arch/arm/mach-keystone/include/mach/clock.h
View File

@ -76,8 +76,9 @@ extern const struct keystone_pll_regs keystone_pll_regs[];
extern s16 divn_val[];
extern int speeds[];
void init_plls(int num_pll, struct pll_init_data *config);
void init_plls(void);
void init_pll(const struct pll_init_data *data);
struct pll_init_data *get_pll_init_data(int pll);
unsigned long clk_get_rate(unsigned int clk);
unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
int clk_set_rate(unsigned int clk, unsigned long hz);

33
board/ti/ks2_evm/board_k2e.c
View File

@ -59,6 +59,26 @@ s16 divn_val[16] = {
static struct pll_init_data pa_pll_config =
PASS_PLL_1000;
struct pll_init_data *get_pll_init_data(int pll)
{
int speed;
struct pll_init_data *data;
switch (pll) {
case MAIN_PLL:
speed = get_max_dev_speed();
data = &core_pll_config[speed];
break;
case PASS_PLL:
data = &pa_pll_config;
break;
default:
data = NULL;
}
return data;
}
#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
struct eth_priv_t eth_priv_cfg[] = {
{
@ -128,24 +148,15 @@ int get_num_eth_ports(void)
#if defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void)
{
int speed;
speed = get_max_dev_speed();
init_pll(&core_pll_config[speed]);
init_pll(&pa_pll_config);
init_plls();
return 0;
}
#endif
#ifdef CONFIG_SPL_BUILD
static struct pll_init_data spl_pll_config[] = {
CORE_PLL_800,
};
void spl_init_keystone_plls(void)
{
init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
init_plls();
}
#endif

41
board/ti/ks2_evm/board_k2hk.c
View File

@ -50,6 +50,30 @@ static struct pll_init_data tetris_pll_config[] = {
static struct pll_init_data pa_pll_config =
PASS_PLL_983;
struct pll_init_data *get_pll_init_data(int pll)
{
int speed;
struct pll_init_data *data;
switch (pll) {
case MAIN_PLL:
speed = get_max_dev_speed();
data = &core_pll_config[speed];
break;
case TETRIS_PLL:
speed = get_max_arm_speed();
data = &tetris_pll_config[speed];
break;
case PASS_PLL:
data = &pa_pll_config;
break;
default:
data = NULL;
}
return data;
}
#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
struct eth_priv_t eth_priv_cfg[] = {
{
@ -91,28 +115,15 @@ int get_num_eth_ports(void)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
int speed;
speed = get_max_dev_speed();
init_pll(&core_pll_config[speed]);
init_pll(&pa_pll_config);
speed = get_max_arm_speed();
init_pll(&tetris_pll_config[speed]);
init_plls();
return 0;
}
#endif
#ifdef CONFIG_SPL_BUILD
static struct pll_init_data spl_pll_config[] = {
CORE_PLL_799,
TETRIS_PLL_500,
};
void spl_init_keystone_plls(void)
{
init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
init_plls();
}
#endif

41
board/ti/ks2_evm/board_k2l.c
View File

@ -46,6 +46,30 @@ static struct pll_init_data tetris_pll_config[] = {
static struct pll_init_data pa_pll_config =
PASS_PLL_983;
struct pll_init_data *get_pll_init_data(int pll)
{
int speed;
struct pll_init_data *data;
switch (pll) {
case MAIN_PLL:
speed = get_max_dev_speed();
data = &core_pll_config[speed];
break;
case TETRIS_PLL:
speed = get_max_arm_speed();
data = &tetris_pll_config[speed];
break;
case PASS_PLL:
data = &pa_pll_config;
break;
default:
data = NULL;
}
return data;
}
#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
struct eth_priv_t eth_priv_cfg[] = {
{
@ -87,28 +111,15 @@ int get_num_eth_ports(void)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
int speed;
speed = get_max_dev_speed();
init_pll(&core_pll_config[speed]);
init_pll(&pa_pll_config);
speed = get_max_arm_speed();
init_pll(&tetris_pll_config[speed]);
init_plls();
return 0;
}
#endif
#ifdef CONFIG_SPL_BUILD
static struct pll_init_data spl_pll_config[] = {
CORE_PLL_799,
TETRIS_PLL_491,
};
void spl_init_keystone_plls(void)
{
init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
init_plls();
}
#endif