brain-hackers_pepepper-mirror/u-boot-brain
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brain
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3 Commits

Author SHA1 Message Date
Marek Vasut
e935409199 clk: renesas: Make reset controller modemr register offset configurable 
The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.

Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
 2021-05-21 15:00:17 +02:00
Marek Vasut
8152c189bd clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12 
Synchronize R-Car Gen2 clock tables with Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
 2021-05-21 15:00:16 +02:00
Marek Vasut
dedb60fb5b clk: renesas: Add Gen2 clock core 
Add common clock code for Renesas RCar Gen2 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2018-01-24 23:27:22 +01:00