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configs: socfpga: soc64: Avoid SPL enter infinite loop during exception 

In current implementation, any exception would trigger a CPU reset.
But a bad written SPL would cause infinite loop where the system
will reload the same SPL instead of loading factory safe image.

Hence this patch is to ensure any exception will cause a hang. At this
moment, watchdog shall be triggered and Remote System Update mechanism
shall load the next production image or factory safe image.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Chin Liang See 2020-08-05 18:34:33 +08:00 committed by Ley Foon Tan
parent 12cc44884b
commit f833d6a4ce
2 changed files with 2 additions and 0 deletions
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1
configs/socfpga_agilex_defconfig
View File

@ -61,3 +61,4 @@ CONFIG_DM_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_PANIC_HANG=y

1
configs/socfpga_stratix10_defconfig
View File

@ -67,3 +67,4 @@ CONFIG_USB_STORAGE=y
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_PANIC_HANG=y