Merge tag 'mmc-2021-6-22' of https://source.denx.de/u-boot/custodians/u-boot-mmc
- Revert fsl_esdhc_imx using VENDORSPEC_FRC_SDCLK_ON - Fix data read for dw_mmc - Increase minimum bus freq for mtk-sd - Minor cleanup
This commit is contained in:
commit
c3a095d1ce
14
cmd/mmc.c
14
cmd/mmc.c
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@ -808,7 +808,7 @@ static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag,
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return CMD_RET_SUCCESS;
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return CMD_RET_SUCCESS;
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}
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}
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static int mmc_partconf_print(struct mmc *mmc)
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static int mmc_partconf_print(struct mmc *mmc, const char *varname)
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{
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{
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u8 ack, access, part;
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u8 ack, access, part;
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@ -821,6 +821,9 @@ static int mmc_partconf_print(struct mmc *mmc)
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ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config);
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ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config);
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part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
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part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
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if(varname)
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env_set_hex(varname, part);
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printf("EXT_CSD[179], PARTITION_CONFIG:\n"
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printf("EXT_CSD[179], PARTITION_CONFIG:\n"
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"BOOT_ACK: 0x%x\n"
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"BOOT_ACK: 0x%x\n"
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"BOOT_PARTITION_ENABLE: 0x%x\n"
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"BOOT_PARTITION_ENABLE: 0x%x\n"
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@ -836,7 +839,7 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag,
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struct mmc *mmc;
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struct mmc *mmc;
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u8 ack, part_num, access;
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u8 ack, part_num, access;
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if (argc != 2 && argc != 5)
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if (argc != 2 && argc != 3 && argc != 5)
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return CMD_RET_USAGE;
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return CMD_RET_USAGE;
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dev = simple_strtoul(argv[1], NULL, 10);
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dev = simple_strtoul(argv[1], NULL, 10);
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@ -850,8 +853,8 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag,
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return CMD_RET_FAILURE;
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return CMD_RET_FAILURE;
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}
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}
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if (argc == 2)
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if (argc == 2 || argc == 3)
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return mmc_partconf_print(mmc);
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return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL);
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ack = simple_strtoul(argv[2], NULL, 10);
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ack = simple_strtoul(argv[2], NULL, 10);
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part_num = simple_strtoul(argv[3], NULL, 10);
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part_num = simple_strtoul(argv[3], NULL, 10);
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@ -1061,8 +1064,9 @@ U_BOOT_CMD(
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" - Set the BOOT_BUS_WIDTH field of the specified device\n"
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" - Set the BOOT_BUS_WIDTH field of the specified device\n"
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"mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n"
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"mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n"
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" - Change sizes of boot and RPMB partitions of specified device\n"
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" - Change sizes of boot and RPMB partitions of specified device\n"
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"mmc partconf <dev> [boot_ack boot_partition partition_access]\n"
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"mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]\n"
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" - Show or change the bits of the PARTITION_CONFIG field of the specified device\n"
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" - Show or change the bits of the PARTITION_CONFIG field of the specified device\n"
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" If showing the bits, optionally store the boot_partition field into varname\n"
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"mmc rst-function <dev> <value>\n"
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"mmc rst-function <dev> <value>\n"
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" - Change the RST_n_FUNCTION field of the specified device\n"
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" - Change the RST_n_FUNCTION field of the specified device\n"
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" WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
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" WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
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@ -19,7 +19,7 @@ Synopsis
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mmc wp
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mmc wp
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mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
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mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
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mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB>
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mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB>
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mmc partconf <dev> [boot_ack boot_partition partition_access]
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mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]
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mmc rst-function <dev> <value>
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mmc rst-function <dev> <value>
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Description
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Description
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@ -92,6 +92,8 @@ The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specifi
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The 'mmc partconf' command shows or changes PARTITION_CONFIG field.
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The 'mmc partconf' command shows or changes PARTITION_CONFIG field.
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varname
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When showing the PARTITION_CONFIG, an optional environment variable to store the current boot_partition value into.
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boot_ack
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boot_ack
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boot acknowledge value
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boot acknowledge value
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boot_partition
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boot_partition
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@ -166,7 +166,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
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if (host->fifo_mode && size) {
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if (host->fifo_mode && size) {
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len = 0;
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len = 0;
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if (data->flags == MMC_DATA_READ &&
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if (data->flags == MMC_DATA_READ &&
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(mask & DWMCI_INTMSK_RXDR)) {
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(mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
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dwmci_writel(host, DWMCI_RINTSTS,
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DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
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while (size) {
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while (size) {
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ret = dwmci_fifo_ready(host,
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ret = dwmci_fifo_ready(host,
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DWMCI_FIFO_EMPTY,
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DWMCI_FIFO_EMPTY,
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@ -182,8 +184,6 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
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dwmci_readl(host, DWMCI_DATA);
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dwmci_readl(host, DWMCI_DATA);
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size = size > len ? (size - len) : 0;
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size = size > len ? (size - len) : 0;
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}
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}
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dwmci_writel(host, DWMCI_RINTSTS,
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DWMCI_INTMSK_RXDR);
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} else if (data->flags == MMC_DATA_WRITE &&
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} else if (data->flags == MMC_DATA_WRITE &&
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(mask & DWMCI_INTMSK_TXDR)) {
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(mask & DWMCI_INTMSK_TXDR)) {
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while (size) {
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while (size) {
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@ -653,10 +653,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
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clk = (pre_div << 8) | (div << 4);
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clk = (pre_div << 8) | (div << 4);
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#ifdef CONFIG_FSL_USDHC
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#ifdef CONFIG_FSL_USDHC
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esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
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ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
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if (ret)
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pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n");
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#else
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#else
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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#endif
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#endif
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@ -668,7 +665,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
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pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n");
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pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n");
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#ifdef CONFIG_FSL_USDHC
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#ifdef CONFIG_FSL_USDHC
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN);
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#else
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#else
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
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#endif
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#endif
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@ -723,14 +720,8 @@ static void esdhc_set_strobe_dll(struct mmc *mmc)
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struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
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struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
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struct fsl_esdhc *regs = priv->esdhc_regs;
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struct fsl_esdhc *regs = priv->esdhc_regs;
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u32 val;
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u32 val;
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u32 tmp;
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int ret;
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if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
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if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
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esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
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if (ret)
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pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n");
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esdhc_write32(®s->strobe_dllctrl, ESDHC_STROBE_DLL_CTRL_RESET);
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esdhc_write32(®s->strobe_dllctrl, ESDHC_STROBE_DLL_CTRL_RESET);
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/*
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/*
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@ -748,7 +739,6 @@ static void esdhc_set_strobe_dll(struct mmc *mmc)
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pr_warn("HS400 strobe DLL status REF not lock!\n");
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pr_warn("HS400 strobe DLL status REF not lock!\n");
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if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))
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if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))
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pr_warn("HS400 strobe DLL status SLV not lock!\n");
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pr_warn("HS400 strobe DLL status SLV not lock!\n");
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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}
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}
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}
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}
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@ -865,7 +855,7 @@ static void esdhc_stop_tuning(struct mmc *mmc)
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cmd.cmdarg = 0;
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cmd.cmdarg = 0;
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cmd.resp_type = MMC_RSP_R1b;
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cmd.resp_type = MMC_RSP_R1b;
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dm_mmc_send_cmd(mmc->dev, &cmd, NULL);
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mmc_send_cmd(mmc, &cmd, NULL);
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}
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}
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static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
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static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
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@ -980,18 +970,14 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
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#ifdef MMC_SUPPORTS_TUNING
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#ifdef MMC_SUPPORTS_TUNING
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if (mmc->clk_disable) {
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if (mmc->clk_disable) {
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#ifdef CONFIG_FSL_USDHC
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#ifdef CONFIG_FSL_USDHC
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u32 tmp;
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esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
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esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100);
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if (ret)
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pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n");
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#else
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#else
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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#endif
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#endif
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} else {
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} else {
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#ifdef CONFIG_FSL_USDHC
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#ifdef CONFIG_FSL_USDHC
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
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VENDORSPEC_CKEN);
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#else
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#else
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
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esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
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#endif
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#endif
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@ -1067,7 +1053,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
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#ifndef CONFIG_FSL_USDHC
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#ifndef CONFIG_FSL_USDHC
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esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
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esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
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#else
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#else
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN);
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#endif
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#endif
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/* Set the initial clock speed */
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/* Set the initial clock speed */
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@ -1205,7 +1191,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
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esdhc_write32(®s->autoc12err, 0);
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esdhc_write32(®s->autoc12err, 0);
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esdhc_write32(®s->clktunectrlstatus, 0);
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esdhc_write32(®s->clktunectrlstatus, 0);
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#else
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#else
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON);
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esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
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VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN);
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#endif
|
#endif
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if (priv->vs18_enable)
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if (priv->vs18_enable)
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@ -15,7 +15,7 @@
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#include <linux/compat.h>
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#include <linux/compat.h>
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#include "mmc_private.h"
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#include "mmc_private.h"
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int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt)
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static int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt)
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{
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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@ -31,7 +31,7 @@ int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt)
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return dm_mmc_get_b_max(mmc->dev, dst, blkcnt);
|
return dm_mmc_get_b_max(mmc->dev, dst, blkcnt);
|
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}
|
}
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||||||
|
|
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int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
|
static int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
|
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struct mmc_data *data)
|
struct mmc_data *data)
|
||||||
{
|
{
|
||||||
struct mmc *mmc = mmc_get_mmc_dev(dev);
|
struct mmc *mmc = mmc_get_mmc_dev(dev);
|
||||||
|
@ -53,7 +53,7 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
|
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return dm_mmc_send_cmd(mmc->dev, cmd, data);
|
return dm_mmc_send_cmd(mmc->dev, cmd, data);
|
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}
|
}
|
||||||
|
|
||||||
int dm_mmc_set_ios(struct udevice *dev)
|
static int dm_mmc_set_ios(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -67,7 +67,7 @@ int mmc_set_ios(struct mmc *mmc)
|
||||||
return dm_mmc_set_ios(mmc->dev);
|
return dm_mmc_set_ios(mmc->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us)
|
static int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -81,7 +81,7 @@ int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
|
||||||
return dm_mmc_wait_dat0(mmc->dev, state, timeout_us);
|
return dm_mmc_wait_dat0(mmc->dev, state, timeout_us);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_get_wp(struct udevice *dev)
|
static int dm_mmc_get_wp(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -95,7 +95,7 @@ int mmc_getwp(struct mmc *mmc)
|
||||||
return dm_mmc_get_wp(mmc->dev);
|
return dm_mmc_get_wp(mmc->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_get_cd(struct udevice *dev)
|
static int dm_mmc_get_cd(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -110,7 +110,7 @@ int mmc_getcd(struct mmc *mmc)
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef MMC_SUPPORTS_TUNING
|
#ifdef MMC_SUPPORTS_TUNING
|
||||||
int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
|
static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -126,7 +126,7 @@ int mmc_execute_tuning(struct mmc *mmc, uint opcode)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
|
#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
|
||||||
int dm_mmc_set_enhanced_strobe(struct udevice *dev)
|
static int dm_mmc_set_enhanced_strobe(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -142,7 +142,7 @@ int mmc_set_enhanced_strobe(struct mmc *mmc)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
int dm_mmc_hs400_prepare_ddr(struct udevice *dev)
|
static int dm_mmc_hs400_prepare_ddr(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -157,7 +157,7 @@ int mmc_hs400_prepare_ddr(struct mmc *mmc)
|
||||||
return dm_mmc_hs400_prepare_ddr(mmc->dev);
|
return dm_mmc_hs400_prepare_ddr(mmc->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_host_power_cycle(struct udevice *dev)
|
static int dm_mmc_host_power_cycle(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -171,7 +171,7 @@ int mmc_host_power_cycle(struct mmc *mmc)
|
||||||
return dm_mmc_host_power_cycle(mmc->dev);
|
return dm_mmc_host_power_cycle(mmc->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_deferred_probe(struct udevice *dev)
|
static int dm_mmc_deferred_probe(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
@ -186,7 +186,7 @@ int mmc_deferred_probe(struct mmc *mmc)
|
||||||
return dm_mmc_deferred_probe(mmc->dev);
|
return dm_mmc_deferred_probe(mmc->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
int dm_mmc_reinit(struct udevice *dev)
|
static int dm_mmc_reinit(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
struct dm_mmc_ops *ops = mmc_get_ops(dev);
|
||||||
|
|
||||||
|
|
|
@ -12,7 +12,6 @@
|
||||||
|
|
||||||
#include <mmc.h>
|
#include <mmc.h>
|
||||||
|
|
||||||
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data);
|
|
||||||
int mmc_send_status(struct mmc *mmc, unsigned int *status);
|
int mmc_send_status(struct mmc *mmc, unsigned int *status);
|
||||||
int mmc_poll_for_busy(struct mmc *mmc, int timeout);
|
int mmc_poll_for_busy(struct mmc *mmc, int timeout);
|
||||||
|
|
||||||
|
|
|
@ -232,6 +232,8 @@
|
||||||
|
|
||||||
#define SCLK_CYCLES_SHIFT 20
|
#define SCLK_CYCLES_SHIFT 20
|
||||||
|
|
||||||
|
#define MIN_BUS_CLK 200000
|
||||||
|
|
||||||
#define CMD_INTS_MASK \
|
#define CMD_INTS_MASK \
|
||||||
(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
|
(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
|
||||||
|
|
||||||
|
@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev)
|
||||||
else
|
else
|
||||||
cfg->f_min = host->src_clk_freq / (4 * 4095);
|
cfg->f_min = host->src_clk_freq / (4 * 4095);
|
||||||
|
|
||||||
|
if (cfg->f_min < MIN_BUS_CLK)
|
||||||
|
cfg->f_min = MIN_BUS_CLK;
|
||||||
|
|
||||||
if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
|
if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
|
||||||
cfg->f_max = host->src_clk_freq;
|
cfg->f_max = host->src_clk_freq;
|
||||||
|
|
||||||
|
|
|
@ -144,6 +144,8 @@ static int socfpga_dwmmc_of_to_plat(struct udevice *dev)
|
||||||
"smplsel", 0);
|
"smplsel", 0);
|
||||||
host->priv = priv;
|
host->priv = priv;
|
||||||
|
|
||||||
|
host->fifo_mode = dev_read_bool(dev, "fifo-mode");
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -39,7 +39,6 @@
|
||||||
#define VENDORSPEC_HCKEN 0x00001000
|
#define VENDORSPEC_HCKEN 0x00001000
|
||||||
#define VENDORSPEC_IPGEN 0x00000800
|
#define VENDORSPEC_IPGEN 0x00000800
|
||||||
#define VENDORSPEC_INIT 0x20007809
|
#define VENDORSPEC_INIT 0x20007809
|
||||||
#define VENDORSPEC_FRC_SDCLK_ON 0x00000100
|
|
||||||
|
|
||||||
#define IRQSTAT 0x0002e030
|
#define IRQSTAT 0x0002e030
|
||||||
#define IRQSTAT_DMAE (0x10000000)
|
#define IRQSTAT_DMAE (0x10000000)
|
||||||
|
@ -97,7 +96,6 @@
|
||||||
#define PRSSTAT_CINS (0x00010000)
|
#define PRSSTAT_CINS (0x00010000)
|
||||||
#define PRSSTAT_BREN (0x00000800)
|
#define PRSSTAT_BREN (0x00000800)
|
||||||
#define PRSSTAT_BWEN (0x00000400)
|
#define PRSSTAT_BWEN (0x00000400)
|
||||||
#define PRSSTAT_SDOFF (0x00000080)
|
|
||||||
#define PRSSTAT_SDSTB (0X00000008)
|
#define PRSSTAT_SDSTB (0X00000008)
|
||||||
#define PRSSTAT_DLA (0x00000004)
|
#define PRSSTAT_DLA (0x00000004)
|
||||||
#define PRSSTAT_CICHB (0x00000002)
|
#define PRSSTAT_CICHB (0x00000002)
|
||||||
|
|
|
@ -539,18 +539,6 @@ struct dm_mmc_ops {
|
||||||
|
|
||||||
#define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
|
#define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
|
||||||
|
|
||||||
int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
|
|
||||||
struct mmc_data *data);
|
|
||||||
int dm_mmc_set_ios(struct udevice *dev);
|
|
||||||
int dm_mmc_get_cd(struct udevice *dev);
|
|
||||||
int dm_mmc_get_wp(struct udevice *dev);
|
|
||||||
int dm_mmc_execute_tuning(struct udevice *dev, uint opcode);
|
|
||||||
int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us);
|
|
||||||
int dm_mmc_host_power_cycle(struct udevice *dev);
|
|
||||||
int dm_mmc_deferred_probe(struct udevice *dev);
|
|
||||||
int dm_mmc_reinit(struct udevice *dev);
|
|
||||||
int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt);
|
|
||||||
|
|
||||||
/* Transition functions for compatibility */
|
/* Transition functions for compatibility */
|
||||||
int mmc_set_ios(struct mmc *mmc);
|
int mmc_set_ios(struct mmc *mmc);
|
||||||
int mmc_getcd(struct mmc *mmc);
|
int mmc_getcd(struct mmc *mmc);
|
||||||
|
@ -795,6 +783,7 @@ int mmc_initialize(struct bd_info *bis);
|
||||||
int mmc_init_device(int num);
|
int mmc_init_device(int num);
|
||||||
int mmc_init(struct mmc *mmc);
|
int mmc_init(struct mmc *mmc);
|
||||||
int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
|
int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
|
||||||
|
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data);
|
||||||
|
|
||||||
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
|
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
|
||||||
CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
|
CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
|
||||||
|
|
Loading…
Reference in New Issue