mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
Minor code cleanup
This commit is contained in:
Wolfgang Denk
parent
4e3ccd2692
commit
bfc81252c0
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@ -2,6 +2,8 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Minor code cleanup
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* Merge the new NAND code (testing-NAND brach); see doc/README.nand
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Rewrite of NAND code based on what is in 2.6.12 Linux kernel
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Patch by Ladislav Michl, 29 Jun 2005
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@ -35,4 +35,3 @@ endif
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# legacy nand support
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@ -30,4 +30,3 @@ TEXT_BASE = 0xFFF00000
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PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\
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-DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\
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-DTEXT_BASE=$(TEXT_BASE)
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@ -32,4 +32,3 @@ BOARDLIBS = drivers/nand/libnand.a
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@ -81,7 +81,7 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
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break;
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}
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if (in32(GPIO0_IR) & rb_gpio_pin)
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if (in32(GPIO0_IR) & rb_gpio_pin)
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return 1;
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return 0;
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}
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@ -42,9 +42,6 @@
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#error "must define CFG_CMD_FAT"
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#endif
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extern au_image_t au_image[];
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extern int N_AU_IMAGES;
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@ -120,4 +120,3 @@ U_BOOT_CMD(
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);
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#endif
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@ -36,9 +36,9 @@ int board_early_init_f (void)
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cntrl0Reg = mfdcr(cntrl0);
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mtdcr(cntrl0, cntrl0Reg | ((CFG_EEPROM_WP | CFG_PB_LED | CFG_SELF_RST | CFG_INTA_FAKE) << 5));
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/* set output pins to high */
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/* set output pins to high */
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out32(GPIO0_OR, CFG_EEPROM_WP);
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/* setup for output (LED=off) */
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/* setup for output (LED=off) */
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out32(GPIO0_TCR, CFG_EEPROM_WP | CFG_PB_LED);
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/*
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@ -41,4 +41,3 @@ endif
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@ -378,7 +378,6 @@ int misc_init_r ()
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[3]);
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}
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return 0;
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}
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@ -12,7 +12,7 @@
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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@ -46,8 +46,8 @@ static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = {
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#ifdef CONFIG_USE_CPCIDVI
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typedef struct {
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unsigned int base;
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unsigned int init;
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unsigned int base;
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unsigned int init;
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} GT_CPCIDVI_ROM_T;
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static GT_CPCIDVI_ROM_T gt_cpcidvi_rom = {0, 0};
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@ -133,20 +133,20 @@ static const unsigned int pci_p2p_configuration[] = {
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/********************************************************************
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* pciWriteConfigReg - Write to a PCI configuration register
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* - Make sure the GT is configured as a master before writing
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* to another device on the PCI.
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* - The function takes care of Big/Little endian conversion.
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* - Make sure the GT is configured as a master before writing
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* to another device on the PCI.
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* - The function takes care of Big/Little endian conversion.
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*
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*
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* Inputs: unsigned int regOffset: The register offset as it apears in the GT spec
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* (or any other PCI device spec)
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* pciDevNum: The device number needs to be addressed.
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* (or any other PCI device spec)
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* pciDevNum: The device number needs to be addressed.
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*
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* Configuration Address 0xCF8:
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*
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* |congif|Reserved| Bus |Device|Function|Register|00|
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* |Enable| |Number|Number| Number | Number | | <=field Name
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* |Enable| |Number|Number| Number | Number | | <=field Name
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*
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*********************************************************************/
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void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
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@ -180,20 +180,20 @@ void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
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/********************************************************************
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* pciReadConfigReg - Read from a PCI0 configuration register
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* - Make sure the GT is configured as a master before reading
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* from another device on the PCI.
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* - The function takes care of Big/Little endian conversion.
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* - Make sure the GT is configured as a master before reading
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* from another device on the PCI.
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* - The function takes care of Big/Little endian conversion.
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* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
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* spec)
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* pciDevNum: The device number needs to be addressed.
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* spec)
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* pciDevNum: The device number needs to be addressed.
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* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
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* cause register to make sure the data is valid
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* cause register to make sure the data is valid
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*
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* Configuration Address 0xCF8:
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*
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* |congif|Reserved| Bus |Device|Function|Register|00|
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* |Enable| |Number|Number| Number | Number | | <=field Name
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* |Enable| |Number|Number| Number | Number | | <=field Name
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*
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*********************************************************************/
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unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
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@ -228,21 +228,21 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
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/********************************************************************
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* pciOverBridgeWriteConfigReg - Write to a PCI configuration register where
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* the agent is placed on another Bus. For more
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* information read P2P in the PCI spec.
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* the agent is placed on another Bus. For more
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* information read P2P in the PCI spec.
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*
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* Inputs: unsigned int regOffset - The register offset as it apears in the
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* GT spec (or any other PCI device spec).
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* unsigned int pciDevNum - The device number needs to be addressed.
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* unsigned int busNum - On which bus does the Target agent connect
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* to.
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* unsigned int data - data to be written.
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* GT spec (or any other PCI device spec).
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* unsigned int pciDevNum - The device number needs to be addressed.
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* unsigned int busNum - On which bus does the Target agent connect
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* to.
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* unsigned int data - data to be written.
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*
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* Configuration Address 0xCF8:
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*
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* |congif|Reserved| Bus |Device|Function|Register|01|
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* |Enable| |Number|Number| Number | Number | | <=field Name
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* |Enable| |Number|Number| Number | Number | | <=field Name
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*
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* The configuration Address is configure as type-I (bits[1:0] = '01') due to
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* PCI spec referring to P2P.
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@ -273,23 +273,23 @@ void pciOverBridgeWriteConfigReg (PCI_HOST host,
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/********************************************************************
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* pciOverBridgeReadConfigReg - Read from a PCIn configuration register where
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* the agent target locate on another PCI bus.
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* - Make sure the GT is configured as a master
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* before reading from another device on the PCI.
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* - The function takes care of Big/Little endian
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* conversion.
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* the agent target locate on another PCI bus.
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* - Make sure the GT is configured as a master
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* before reading from another device on the PCI.
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* - The function takes care of Big/Little endian
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* conversion.
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* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
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* spec). (configuration register offset.)
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* pciDevNum: The device number needs to be addressed.
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* busNum: the Bus number where the agent is place.
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* spec). (configuration register offset.)
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* pciDevNum: The device number needs to be addressed.
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* busNum: the Bus number where the agent is place.
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* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
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* cause register to make sure the data is valid
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* cause register to make sure the data is valid
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*
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* Configuration Address 0xCF8:
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*
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
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* |congif|Reserved| Bus |Device|Function|Register|01|
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* |Enable| |Number|Number| Number | Number | | <=field Name
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* |Enable| |Number|Number| Number | Number | | <=field Name
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*
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*********************************************************************/
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unsigned int pciOverBridgeReadConfigReg (PCI_HOST host,
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@ -393,7 +393,7 @@ static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region)
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/********************************************************************
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* pciGetBaseAddress - Gets the base address of a PCI.
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* - If the PCI size is 0 then this base address has no meaning!!!
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* - If the PCI size is 0 then this base address has no meaning!!!
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*
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*
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* INPUT: Bus, Region - The bus and region we ask for its base address.
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@ -501,13 +501,13 @@ void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,
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/********************************************************************
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* pciSetRegionFeatures - This function modifys one of the 8 regions with
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* feature bits given as an input.
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* - Be advised to check the spec before modifying them.
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* feature bits given as an input.
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* - Be advised to check the spec before modifying them.
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* Inputs: PCI_PROTECT_REGION region - one of the eight regions.
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* unsigned int features - See file: pci.h there are defintion for those
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* region features.
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* unsigned int baseAddress - The region base Address.
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* unsigned int topAddress - The region top Address.
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* unsigned int features - See file: pci.h there are defintion for those
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* region features.
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* unsigned int baseAddress - The region base Address.
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* unsigned int topAddress - The region top Address.
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* Returns: false if one of the parameters is erroneous true otherwise.
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*********************************************************************/
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bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
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@ -541,7 +541,7 @@ bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
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/********************************************************************
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* pciDisableAccessRegion - Disable The given Region by writing MAX size
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* to its low Address and MIN size to its high Address.
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* to its low Address and MIN size to its high Address.
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*
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* Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled.
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* Returns: N/A.
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@ -588,12 +588,12 @@ bool pciArbiterDisable (PCI_HOST host)
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* pciSetArbiterAgentsPriority - Priority setup for the PCI agents (Hi or Low)
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*
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* Inputs: PCI_AGENT_PRIO internalAgent - priotity for internal agent.
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* PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.
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* PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.
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* PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.
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* PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.
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* PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.
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* PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.
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* PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.
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* PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.
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* PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.
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* PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.
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* PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.
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* PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.
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* Returns: true
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*********************************************************************/
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bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,
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@ -619,17 +619,17 @@ bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,
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/********************************************************************
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* pciParkingDisable - Park on last option disable, with this function you can
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* disable the park on last mechanism for each agent.
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* disabling this option for all agents results parking
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* on the internal master.
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* disable the park on last mechanism for each agent.
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* disabling this option for all agents results parking
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* on the internal master.
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*
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* Inputs: PCI_AGENT_PARK internalAgent - parking Disable for internal agent.
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* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
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* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
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* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
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* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
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* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
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* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
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* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
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* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
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* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
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* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
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* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
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* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
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* Returns: true
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*********************************************************************/
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bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
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@ -655,11 +655,11 @@ bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
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/********************************************************************
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* pciEnableBrokenAgentDetection - A master is said to be broken if it fails to
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* respond to grant assertion within a window specified in
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* the input value: 'brokenValue'.
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* respond to grant assertion within a window specified in
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* the input value: 'brokenValue'.
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*
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* Inputs: unsigned char brokenValue - A value which limits the Master to hold the
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* grant without asserting frame.
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* grant without asserting frame.
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* Returns: Error for illegal broken value otherwise true.
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*********************************************************************/
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bool pciEnableBrokenAgentDetection (PCI_HOST host, unsigned char brokenValue)
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@ -678,9 +678,9 @@ bool pciEnableBrokenAgentDetection (PCI_HOST host, unsigned char brokenValue)
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/********************************************************************
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* pciDisableBrokenAgentDetection - This function disable the Broken agent
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* Detection mechanism.
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* NOTE: This operation may cause a dead lock on the
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* pci0 arbitration.
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* Detection mechanism.
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* NOTE: This operation may cause a dead lock on the
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* pci0 arbitration.
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*
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* Inputs: N/A
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* Returns: true.
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@ -697,15 +697,15 @@ bool pciDisableBrokenAgentDetection (PCI_HOST host)
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/********************************************************************
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* pciP2PConfig - This function set the PCI_n P2P configurate.
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* For more information on the P2P read PCI spec.
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* For more information on the P2P read PCI spec.
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*
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* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower
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* Boundry.
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* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper
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* Boundry.
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* unsigned int busNum - The CPI bus number to which the PCI interface
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* is connected.
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* unsigned int devNum - The PCI interface's device number.
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* Boundry.
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* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper
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* Boundry.
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* unsigned int busNum - The CPI bus number to which the PCI interface
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* is connected.
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* unsigned int devNum - The PCI interface's device number.
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*
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* Returns: true.
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*********************************************************************/
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@ -723,15 +723,15 @@ bool pciP2PConfig (PCI_HOST host, unsigned int SecondBusLow,
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/********************************************************************
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* pciSetRegionSnoopMode - This function modifys one of the 4 regions which
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* supports Cache Coherency in the PCI_n interface.
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* supports Cache Coherency in the PCI_n interface.
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* Inputs: region - One of the four regions.
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* snoopType - There is four optional Types:
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* 1. No Snoop.
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* 2. Snoop to WT region.
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* 3. Snoop to WB region.
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* 4. Snoop & Invalidate to WB region.
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* baseAddress - Base Address of this region.
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* regionLength - Region length.
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* snoopType - There is four optional Types:
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* 1. No Snoop.
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* 2. Snoop to WT region.
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* 3. Snoop to WB region.
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* 4. Snoop & Invalidate to WB region.
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* baseAddress - Base Address of this region.
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* regionLength - Region length.
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* Returns: false if one of the parameters is wrong otherwise return true.
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*********************************************************************/
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bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
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@ -754,7 +754,7 @@ bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
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GT_REG_WRITE (snoopXtopAddress, 0);
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return true;
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}
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baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
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baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
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data = (baseAddress >> 20) | snoopType << 12;
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GT_REG_WRITE (snoopXbaseAddress, data);
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snoopHigh = (snoopHigh & 0xfff00000) >> 20;
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@ -827,7 +827,7 @@ static void gt_setup_ide (struct pci_controller *hose,
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static void gt_setup_cpcidvi (struct pci_controller *hose,
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pci_dev_t dev, struct pci_config_table *entry)
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{
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||||
u32 bar_value, pci_response;
|
||||
u32 bar_value, pci_response;
|
||||
|
||||
pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &pci_response);
|
||||
pci_hose_write_config_dword (hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff);
|
||||
|
|
@ -843,30 +843,30 @@ static void gt_setup_cpcidvi (struct pci_controller *hose,
|
|||
|
||||
unsigned char gt_cpcidvi_in8(unsigned int offset)
|
||||
{
|
||||
unsigned char data;
|
||||
unsigned char data;
|
||||
|
||||
if (gt_cpcidvi_rom.init == 0) {
|
||||
return(0);
|
||||
}
|
||||
data = in8((offset & 0x04) + 0x3f000 + gt_cpcidvi_rom.base);
|
||||
return(data);
|
||||
return(0);
|
||||
}
|
||||
data = in8((offset & 0x04) + 0x3f000 + gt_cpcidvi_rom.base);
|
||||
return(data);
|
||||
}
|
||||
|
||||
void gt_cpcidvi_out8(unsigned int offset, unsigned char data)
|
||||
{
|
||||
unsigned int off;
|
||||
|
||||
unsigned int off;
|
||||
|
||||
if (gt_cpcidvi_rom.init == 0) {
|
||||
return;
|
||||
}
|
||||
return;
|
||||
}
|
||||
off = data;
|
||||
off = ((off << 3) & 0x7f8) + (offset & 0x4) + 0x3e000 + gt_cpcidvi_rom.base;
|
||||
in8(off);
|
||||
return;
|
||||
in8(off);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
|
||||
/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
|
||||
/* and is curently not called *. */
|
||||
#if 0
|
||||
static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
|
||||
|
|
|
|||
|
|
@ -32,4 +32,3 @@ TEXT_BASE = 0xFFF80000
|
|||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
|
|
|
|||
|
|
@ -29,4 +29,3 @@ TEXT_BASE = 0xFFFC0000
|
|||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
|
|
|
|||
|
|
@ -28,19 +28,12 @@
|
|||
#include <mpc5xxx.h>
|
||||
#include <pci.h>
|
||||
|
||||
//###CHD: es gibt eigentlich kein DDR bei uns -> weg damit!; dto. PCI!
|
||||
#if defined(CONFIG_MPC5200_DDR)
|
||||
#include "mt46v16m16-75.h"
|
||||
#else
|
||||
//#include "mt48lc16m16a2-75.h"
|
||||
#include "mt48lc8m32b2-6-7.h"
|
||||
#endif
|
||||
|
||||
extern flash_info_t flash_info[]; /* FLASH chips info */
|
||||
|
||||
ulong flash_get_size (ulong base, int banknum);
|
||||
|
||||
//###CHD: wenn RAMBOOT gehen wuerde, ....
|
||||
#ifndef CFG_RAMBOOT
|
||||
static void sdram_start (int hi_addr)
|
||||
{
|
||||
|
|
@ -88,7 +81,6 @@ static void sdram_start (int hi_addr)
|
|||
* is something else than 0x00000000.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_MPC5200)
|
||||
long int initdram (int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
|
|
@ -190,58 +182,6 @@ long int initdram (int board_type)
|
|||
return dramsize + dramsize2;
|
||||
}
|
||||
|
||||
//###CHD: sowas gibt es bei usn nicht!
|
||||
#elif defined(CONFIG_MGT5100)
|
||||
|
||||
long int initdram (int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
#ifndef CFG_RAMBOOT
|
||||
ulong test1, test2;
|
||||
|
||||
/* setup and enable SDRAM chip selects */
|
||||
*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
|
||||
*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
|
||||
*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
|
||||
__asm__ volatile ("sync");
|
||||
|
||||
/* setup config registers */
|
||||
*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
|
||||
*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
|
||||
|
||||
/* address select register */
|
||||
*(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
|
||||
__asm__ volatile ("sync");
|
||||
|
||||
/* find RAM size */
|
||||
sdram_start(0);
|
||||
test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
|
||||
sdram_start(1);
|
||||
test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
|
||||
if (test1 > test2) {
|
||||
sdram_start(0);
|
||||
dramsize = test1;
|
||||
} else {
|
||||
dramsize = test2;
|
||||
}
|
||||
|
||||
/* set SDRAM end address according to size */
|
||||
*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
|
||||
|
||||
#else /* CFG_RAMBOOT */
|
||||
|
||||
/* Retrieve amount of SDRAM available */
|
||||
dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
|
||||
|
||||
#endif /* CFG_RAMBOOT */
|
||||
|
||||
return dramsize;
|
||||
}
|
||||
|
||||
#else
|
||||
#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
|
||||
#endif
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
puts ("Board: MCC200\n");
|
||||
|
|
|
|||
|
|
@ -4,27 +4,9 @@
|
|||
|
||||
#define SDRAM_DDR 0 /* is SDR */
|
||||
|
||||
#if defined(CONFIG_MPC5200)
|
||||
/* Settings for XLB = 132 MHz */
|
||||
//#define SDRAM_MODE 0x00cc0000 // CL-3 BURST-8 -> Mode Register—MBAR + 0x0100
|
||||
//#define SDRAM_CONTROL 0x501f0000 // Control Register—MBAR + 0x0104
|
||||
//#define SDRAM_CONFIG1 0xe2329000 // Delays between commands -> Configuration Register 1—MBAR + 0x0108
|
||||
//#define SDRAM_CONFIG2 0x46e70000 // Delays between commands -> Configuration Register 2—MBAR + 0x010C
|
||||
|
||||
//Christian
|
||||
//#define SDRAM_MODE 0x00cd0000 // CL-3 BURST-8 -> Mode Register—MBAR + 0x0100
|
||||
//#define SDRAM_CONTROL 0x501f0000 // Control Register—MBAR + 0x0104
|
||||
//#define SDRAM_CONFIG1 0xd2322900 // Delays between commands -> Configuration Register 1—MBAR + 0x0108
|
||||
//#define SDRAM_CONFIG2 0x8ad70000 // Delays between commands -> Configuration Register 2—MBAR + 0x010C
|
||||
|
||||
//###CHD: ordentliche Doku dazu! CAS=2, etc.
|
||||
//STefan
|
||||
#define SDRAM_MODE 0x008d0000 // CL-3 BURST-8 -> Mode Register—MBAR + 0x0100
|
||||
#define SDRAM_CONTROL 0x504f0000 // Control Register—MBAR + 0x0104
|
||||
#define SDRAM_CONFIG1 0xc2222900 // Delays between commands -> Configuration Register 1—MBAR + 0x0108
|
||||
#define SDRAM_CONFIG2 0x88c70000 // Delays between commands -> Configuration Register 2—MBAR + 0x010C
|
||||
|
||||
|
||||
#else
|
||||
#error CONFIG_MPC5200 not defined, please set parameters for your sdram controller in mt48lc8m32b2.h
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -12,4 +12,3 @@ TEXT_BASE = 0x13FC0000
|
|||
|
||||
# Compile the new NAND code
|
||||
BOARDLIBS = drivers/nand/libnand.a
|
||||
|
||||
|
|
|
|||
|
|
@ -29,4 +29,3 @@ TEXT_BASE = 0x40000000
|
|||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
|
|
|
|||
|
|
@ -442,8 +442,6 @@ void archflashwp(void *archdata, int wp);
|
|||
#define NANDRW_JFFS2 0x02
|
||||
#define NANDRW_JFFS2_SKIP 0x04
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Imports from nand_legacy.c
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -179,7 +179,6 @@ More Definitions:
|
|||
#define NAND_MAX_CHIPS 1
|
||||
|
||||
|
||||
|
||||
NOTE:
|
||||
=====
|
||||
|
||||
|
|
@ -204,7 +203,7 @@ use JFFS, which has been adopted to use the new NAND, and at the same
|
|||
time use NAND in legacy mode. The breakage will disappear when the
|
||||
board-specific code is changed to the new NAND.
|
||||
|
||||
As mentioned above, the legacy code is still used by the DoC subsystem.
|
||||
The consequence of this is that the legacy NAND can't be removed from
|
||||
the tree until the DoC is ported to use the new NAND support (or boards
|
||||
As mentioned above, the legacy code is still used by the DoC subsystem.
|
||||
The consequence of this is that the legacy NAND can't be removed from
|
||||
the tree until the DoC is ported to use the new NAND support (or boards
|
||||
with DoC will break).
|
||||
|
|
|
|||
436
drivers/i8042.c
436
drivers/i8042.c
|
|
@ -12,7 +12,7 @@
|
|||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
|
|
@ -33,7 +33,7 @@
|
|||
extern u8 gt_cpcidvi_in8(u32 offset);
|
||||
extern void gt_cpcidvi_out8(u32 offset, u8 data);
|
||||
|
||||
#define in8(a) gt_cpcidvi_in8(a)
|
||||
#define in8(a) gt_cpcidvi_in8(a)
|
||||
#define out8(a, b) gt_cpcidvi_out8(a,b)
|
||||
#endif
|
||||
|
||||
|
|
@ -49,10 +49,10 @@ static int cursor_state = 0;
|
|||
|
||||
/* locals */
|
||||
|
||||
static int kbd_input = -1; /* no input yet */
|
||||
static int kbd_mapping = KBD_US; /* default US keyboard */
|
||||
static int kbd_flags = NORMAL; /* after reset */
|
||||
static int kbd_state = 0; /* unshift code */
|
||||
static int kbd_input = -1; /* no input yet */
|
||||
static int kbd_mapping = KBD_US; /* default US keyboard */
|
||||
static int kbd_flags = NORMAL; /* after reset */
|
||||
static int kbd_state = 0; /* unshift code */
|
||||
|
||||
static void kbd_conv_char (unsigned char scan_code);
|
||||
static void kbd_led_set (void);
|
||||
|
|
@ -68,230 +68,230 @@ static int kbd_reset (void);
|
|||
|
||||
static unsigned char kbd_fct_map [144] =
|
||||
{ /* kbd_fct_map table for scan code */
|
||||
0, AS, AS, AS, AS, AS, AS, AS, /* scan 0- 7 */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 8- F */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 10-17 */
|
||||
AS, AS, AS, AS, AS, CN, AS, AS, /* scan 18-1F */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 20-27 */
|
||||
AS, AS, SH, AS, AS, AS, AS, AS, /* scan 28-2F */
|
||||
AS, AS, AS, AS, AS, AS, SH, AS, /* scan 30-37 */
|
||||
AS, AS, CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, ES, /* scan 40-47 */
|
||||
ES, ES, ES, ES, ES, ES, ES, ES, /* scan 48-4F */
|
||||
ES, ES, ES, ES, 0, 0, AS, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
AS, 0, 0, AS, 0, 0, AS, 0, /* scan 70-77 */
|
||||
0, AS, 0, 0, 0, AS, 0, 0, /* scan 78-7F */
|
||||
AS, CN, AS, AS, AK, ST, EX, EX, /* enhanced */
|
||||
AS, EX, EX, AS, EX, AS, EX, EX /* enhanced */
|
||||
0, AS, AS, AS, AS, AS, AS, AS, /* scan 0- 7 */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 8- F */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 10-17 */
|
||||
AS, AS, AS, AS, AS, CN, AS, AS, /* scan 18-1F */
|
||||
AS, AS, AS, AS, AS, AS, AS, AS, /* scan 20-27 */
|
||||
AS, AS, SH, AS, AS, AS, AS, AS, /* scan 28-2F */
|
||||
AS, AS, AS, AS, AS, AS, SH, AS, /* scan 30-37 */
|
||||
AS, AS, CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, ES, /* scan 40-47 */
|
||||
ES, ES, ES, ES, ES, ES, ES, ES, /* scan 48-4F */
|
||||
ES, ES, ES, ES, 0, 0, AS, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
AS, 0, 0, AS, 0, 0, AS, 0, /* scan 70-77 */
|
||||
0, AS, 0, 0, 0, AS, 0, 0, /* scan 78-7F */
|
||||
AS, CN, AS, AS, AK, ST, EX, EX, /* enhanced */
|
||||
AS, EX, EX, AS, EX, AS, EX, EX /* enhanced */
|
||||
};
|
||||
|
||||
static unsigned char kbd_key_map [2][5][144] =
|
||||
{
|
||||
{ /* US keyboard */
|
||||
{ /* unshift code */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
|
||||
'\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
|
||||
'\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* shift code */
|
||||
0, 0x1b, '!', '@', '#', '$', '%', '^', /* scan 0- 7 */
|
||||
'&', '*', '(', ')', '_', '+', 0x08, '\t', /* scan 8- F */
|
||||
'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', /* scan 10-17 */
|
||||
'O', 'P', '{', '}', '\r', CN, 'A', 'S', /* scan 18-1F */
|
||||
'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', /* scan 20-27 */
|
||||
'"', '~', SH, '|', 'Z', 'X', 'C', 'V', /* scan 28-2F */
|
||||
'B', 'N', 'M', '<', '>', '?', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '!', '@', '#', '$', '%', '^', /* scan 0- 7 */
|
||||
'&', '*', '(', ')', '_', '+', 0x08, '\t', /* scan 8- F */
|
||||
'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', /* scan 10-17 */
|
||||
'O', 'P', '{', '}', '\r', CN, 'A', 'S', /* scan 18-1F */
|
||||
'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', /* scan 20-27 */
|
||||
'"', '~', SH, '|', 'Z', 'X', 'C', 'V', /* scan 28-2F */
|
||||
'B', 'N', 'M', '<', '>', '?', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* control code */
|
||||
0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
|
||||
0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
|
||||
0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
|
||||
0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
|
||||
0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
|
||||
0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
|
||||
0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
|
||||
0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
|
||||
0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
|
||||
0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
|
||||
0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
|
||||
0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
|
||||
0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
|
||||
0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
|
||||
0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
},
|
||||
{ /* non numeric code */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
|
||||
'\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
|
||||
'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
|
||||
'r', 's', 'p', 'n', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
|
||||
'\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
|
||||
'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
|
||||
'r', 's', 'p', 'n', 0, 0, 0, 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* right alt mode - not used in US keyboard */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 8 - F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50 -57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 8 - F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50 -57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
}
|
||||
},
|
||||
{ /* german keyboard */
|
||||
{ /* unshift code */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
|
||||
0x84, '^', SH, '#', 'y', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', ',', 0, 0, '<', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
|
||||
0x84, '^', SH, '#', 'y', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', ',', 0, 0, '<', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* shift code */
|
||||
0, 0x1b, '!', '"', 0x15, '$', '%', '&', /* scan 0- 7 */
|
||||
'/', '(', ')', '=', '?', '`', 0x08, '\t', /* scan 8- F */
|
||||
'Q', 'W', 'E', 'R', 'T', 'Z', 'U', 'I', /* scan 10-17 */
|
||||
'O', 'P', 0x9a, '*', '\r', CN, 'A', 'S', /* scan 18-1F */
|
||||
'D', 'F', 'G', 'H', 'J', 'K', 'L', 0x99, /* scan 20-27 */
|
||||
0x8e, 0xf8, SH, '\'', 'Y', 'X', 'C', 'V', /* scan 28-2F */
|
||||
'B', 'N', 'M', ';', ':', '_', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', ',', 0, 0, '>', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '!', '"', 0x15, '$', '%', '&', /* scan 0- 7 */
|
||||
'/', '(', ')', '=', '?', '`', 0x08, '\t', /* scan 8- F */
|
||||
'Q', 'W', 'E', 'R', 'T', 'Z', 'U', 'I', /* scan 10-17 */
|
||||
'O', 'P', 0x9a, '*', '\r', CN, 'A', 'S', /* scan 18-1F */
|
||||
'D', 'F', 'G', 'H', 'J', 'K', 'L', 0x99, /* scan 20-27 */
|
||||
0x8e, 0xf8, SH, '\'', 'Y', 'X', 'C', 'V', /* scan 28-2F */
|
||||
'B', 'N', 'M', ';', ':', '_', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
|
||||
'8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
|
||||
'2', '3', '0', ',', 0, 0, '>', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* control code */
|
||||
0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
|
||||
0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
|
||||
0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
|
||||
0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
|
||||
0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
|
||||
0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
|
||||
0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
|
||||
0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
|
||||
0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
|
||||
0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
|
||||
0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
|
||||
0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
|
||||
0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
|
||||
0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
|
||||
0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
},
|
||||
{ /* non numeric code */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
|
||||
0x84, '^', SH, 0, 'y', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
|
||||
'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
|
||||
'r', 's', 'p', 'n', 0, 0, '<', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
|
||||
'7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
|
||||
'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
|
||||
'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
|
||||
'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
|
||||
0x84, '^', SH, 0, 'y', 'x', 'c', 'v', /* scan 28-2F */
|
||||
'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
|
||||
' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
|
||||
0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
|
||||
'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
|
||||
'r', 's', 'p', 'n', 0, 0, '<', 0, /* scan 50-57 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
|
||||
'\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
|
||||
0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
|
||||
},
|
||||
{ /* Right alt mode - is used in German keyboard */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
|
||||
'{', '[', ']', '}', '\\', 0xff, 0xff, 0xff, /* scan 8 - F */
|
||||
'@', 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
|
||||
0xff, 0xff, 0xff, '~', 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
|
||||
0xff, 0xff, 0xe6, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, '|', 0xff, /* scan 50 -57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
|
||||
'{', '[', ']', '}', '\\', 0xff, 0xff, 0xff, /* scan 8 - F */
|
||||
'@', 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
|
||||
0xff, 0xff, 0xff, '~', 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
|
||||
0xff, 0xff, 0xe6, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, '|', 0xff, /* scan 50 -57 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
|
||||
}
|
||||
}
|
||||
};
|
||||
|
|
@ -328,8 +328,8 @@ int i8042_kbd_init (void)
|
|||
|
||||
#ifdef CONFIG_USE_CPCIDVI
|
||||
if ((penv = getenv ("console")) != NULL) {
|
||||
if (strncmp (penv, "serial", 7) == 0) {
|
||||
return -1;
|
||||
if (strncmp (penv, "serial", 7) == 0) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -345,9 +345,9 @@ int i8042_kbd_init (void)
|
|||
{
|
||||
if (kbd_reset() == 0)
|
||||
{
|
||||
kbd_mapping = keymap;
|
||||
kbd_flags = NORMAL;
|
||||
kbd_state = 0;
|
||||
kbd_mapping = keymap;
|
||||
kbd_flags = NORMAL;
|
||||
kbd_state = 0;
|
||||
kbd_led_set();
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -359,7 +359,7 @@ int i8042_kbd_init (void)
|
|||
/*******************************************************************************
|
||||
*
|
||||
* i8042_tstc - test if keyboard input is available
|
||||
* option: cursor blinking if called in a loop
|
||||
* option: cursor blinking if called in a loop
|
||||
*/
|
||||
int i8042_tstc (void)
|
||||
{
|
||||
|
|
@ -395,7 +395,7 @@ int i8042_tstc (void)
|
|||
/*******************************************************************************
|
||||
*
|
||||
* i8042_getc - wait till keyboard input is available
|
||||
* option: turn on/off cursor while waiting
|
||||
* option: turn on/off cursor while waiting
|
||||
*/
|
||||
int i8042_getc (void)
|
||||
{
|
||||
|
|
@ -448,8 +448,8 @@ static void kbd_conv_char (unsigned char scan_code)
|
|||
{
|
||||
if (scan_code == 0xe1)
|
||||
{
|
||||
kbd_flags ^= BRK; /* reset the break flag */
|
||||
kbd_flags ^= E1; /* bitwise EXOR with E1 flag */
|
||||
kbd_flags ^= BRK; /* reset the break flag */
|
||||
kbd_flags ^= E1; /* bitwise EXOR with E1 flag */
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
|
@ -560,7 +560,7 @@ static void kbd_caps (unsigned char scan_code)
|
|||
if ((kbd_flags & BRK) == NORMAL)
|
||||
{
|
||||
kbd_flags ^= CAPS;
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -573,7 +573,7 @@ static void kbd_num (unsigned char scan_code)
|
|||
{
|
||||
kbd_flags ^= NUM;
|
||||
kbd_state = (kbd_flags & NUM) ? AS : NM;
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -585,7 +585,7 @@ static void kbd_scroll (unsigned char scan_code)
|
|||
if ((kbd_flags & BRK) == NORMAL)
|
||||
{
|
||||
kbd_flags ^= STP;
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
kbd_led_set (); /* update keyboard LED */
|
||||
if (kbd_flags & STP)
|
||||
kbd_input = 0x13;
|
||||
else
|
||||
|
|
@ -615,9 +615,9 @@ static void kbd_alt (unsigned char scan_code)
|
|||
static void kbd_led_set (void)
|
||||
{
|
||||
kbd_input_empty();
|
||||
out8 (I8042_DATA_REG, 0xed); /* SET LED command */
|
||||
out8 (I8042_DATA_REG, 0xed); /* SET LED command */
|
||||
kbd_input_empty();
|
||||
out8 (I8042_DATA_REG, (kbd_flags & 0x7)); /* LED bits only */
|
||||
out8 (I8042_DATA_REG, (kbd_flags & 0x7)); /* LED bits only */
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
|
|
@ -57,7 +57,7 @@
|
|||
|
||||
#define CONFIG_CPCI750 1 /* this is an CPCI750 board */
|
||||
|
||||
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */
|
||||
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */
|
||||
|
||||
#undef CONFIG_ECC /* enable ECC support */
|
||||
|
||||
|
|
@ -84,19 +84,19 @@
|
|||
* for your console driver.
|
||||
*
|
||||
* what to do:
|
||||
* to use the DUART, undef CONFIG_MPSC. If you have hacked a serial
|
||||
* to use the DUART, undef CONFIG_MPSC. If you have hacked a serial
|
||||
* cable onto the second DUART channel, change the CFG_DUART port from 1
|
||||
* to 0 below.
|
||||
*
|
||||
* to use the MPSC, #define CONFIG_MPSC. If you have wired up another
|
||||
* mpsc channel, change CONFIG_MPSC_PORT to the desired value.
|
||||
*/
|
||||
#define CONFIG_MPSC
|
||||
#define CONFIG_MPSC
|
||||
#define CONFIG_MPSC_PORT 0
|
||||
|
||||
/* to change the default ethernet port, use this define (options: 0, 1, 2) */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define MV_ETH_DEVS 1
|
||||
#define MV_ETH_DEVS 1
|
||||
#define CONFIG_ETHER_PORT 0
|
||||
|
||||
#undef CONFIG_ETHER_PORT_MII /* use RMII */
|
||||
|
|
@ -118,38 +118,38 @@
|
|||
|
||||
#define CONFIG_SERIAL "AA000001"
|
||||
#define CONFIG_SERVERIP "10.0.0.79"
|
||||
#define CONFIG_ROOTPATH "/export/nfs_cpci750/%s"
|
||||
#define CONFIG_ROOTPATH "/export/nfs_cpci750/%s"
|
||||
|
||||
#define CONFIG_TESTDRAMDATA y
|
||||
#define CONFIG_TESTDRAMADDRESS n
|
||||
#define CONFIG_TESTDRAMADDRESS n
|
||||
#define CONFIG_TESETDRAMWALK n
|
||||
|
||||
/* ----------------------------------------------------------------------------- */
|
||||
|
||||
|
||||
#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
|
||||
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
|
||||
#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
|
||||
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
|
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
#undef CONFIG_ALTIVEC /* undef to disable */
|
||||
#undef CONFIG_ALTIVEC /* undef to disable */
|
||||
|
||||
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
|
||||
CONFIG_BOOTP_BOOTFILESIZE)
|
||||
|
||||
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
|
||||
| CFG_CMD_ASKENV \
|
||||
| CFG_CMD_I2C \
|
||||
| CFG_CMD_I2C \
|
||||
| CFG_CMD_CACHE \
|
||||
| CFG_CMD_EEPROM \
|
||||
| CFG_CMD_PCI \
|
||||
| CFG_CMD_PCI \
|
||||
| CFG_CMD_ELF \
|
||||
| CFG_CMD_DATE \
|
||||
| CFG_CMD_NET \
|
||||
| CFG_CMD_PING \
|
||||
| CFG_CMD_IDE \
|
||||
| CFG_CMD_FAT \
|
||||
| CFG_CMD_EXT2 \
|
||||
| CFG_CMD_NET \
|
||||
| CFG_CMD_PING \
|
||||
| CFG_CMD_IDE \
|
||||
| CFG_CMD_FAT \
|
||||
| CFG_CMD_EXT2 \
|
||||
)
|
||||
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
|
@ -159,7 +159,7 @@
|
|||
|
||||
#define CONFIG_USE_CPCIDVI
|
||||
|
||||
#ifdef CONFIG_USE_CPCIDVI
|
||||
#ifdef CONFIG_USE_CPCIDVI
|
||||
#define CONFIG_VIDEO
|
||||
#define CONFIG_VIDEO_CT69000
|
||||
#define CONFIG_CFB_CONSOLE
|
||||
|
|
@ -174,23 +174,23 @@
|
|||
*/
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_SPEED 80000 /* I2C speed default */
|
||||
#define CFG_I2C_SPEED 80000 /* I2C speed default */
|
||||
|
||||
#define CFG_GT_DUAL_CPU /* also for JTAG even with one cpu */
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#else
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#endif
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
/*#define CFG_MEMTEST_START 0x00400000*/ /* memtest works on */
|
||||
/*#define CFG_MEMTEST_END 0x00C00000*/ /* 4 ... 12 MB in DRAM */
|
||||
/*#define CFG_MEMTEST_END 0x07c00000*/ /* 4 ... 124 MB in DRAM */
|
||||
/*#define CFG_MEMTEST_END 0x07c00000*/ /* 4 ... 124 MB in DRAM */
|
||||
|
||||
/*
|
||||
#define CFG_DRAM_TEST
|
||||
|
|
@ -198,21 +198,21 @@
|
|||
* CFG_DRAM_TEST - enables the following tests.
|
||||
*
|
||||
* CFG_DRAM_TEST_DATA - Enables test for shorted or open data lines
|
||||
* Environment variable 'test_dram_data' must be
|
||||
* set to 'y'.
|
||||
* Environment variable 'test_dram_data' must be
|
||||
* set to 'y'.
|
||||
* CFG_DRAM_TEST_DATA - Enables test to verify that each word is uniquely
|
||||
* addressable. Environment variable
|
||||
* 'test_dram_address' must be set to 'y'.
|
||||
* addressable. Environment variable
|
||||
* 'test_dram_address' must be set to 'y'.
|
||||
* CFG_DRAM_TEST_WALK - Enables test a 64-bit walking ones pattern test.
|
||||
* This test takes about 6 minutes to test 64 MB.
|
||||
* Environment variable 'test_dram_walk' must be
|
||||
* set to 'y'.
|
||||
* This test takes about 6 minutes to test 64 MB.
|
||||
* Environment variable 'test_dram_walk' must be
|
||||
* set to 'y'.
|
||||
*/
|
||||
#define CFG_DRAM_TEST
|
||||
#if defined(CFG_DRAM_TEST)
|
||||
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
|
||||
/*#define CFG_MEMTEST_END 0x00C00000*/ /* 4 ... 12 MB in DRAM */
|
||||
#define CFG_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
|
||||
#define CFG_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
|
||||
#define CFG_DRAM_TEST_DATA
|
||||
#define CFG_DRAM_TEST_ADDRESS
|
||||
#define CFG_DRAM_TEST_WALK
|
||||
|
|
@ -221,10 +221,10 @@
|
|||
#define CONFIG_DISPLAY_MEMMAP /* at the end of the bootprocess show the memory map */
|
||||
#undef CFG_DISPLAY_DIMM_SPD_CONTENT /* show SPD content during boot */
|
||||
|
||||
#define CFG_LOAD_ADDR 0x00300000 /* default load address */
|
||||
#define CFG_LOAD_ADDR 0x00300000 /* default load address */
|
||||
|
||||
#define CFG_HZ 1000 /* decr freq: 1ms ticks */
|
||||
#define CFG_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
|
||||
#define CFG_HZ 1000 /* decr freq: 1ms ticks */
|
||||
#define CFG_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
|
||||
#define CFG_BUS_CLK CFG_BUS_HZ
|
||||
|
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
|
||||
|
|
@ -251,7 +251,7 @@
|
|||
* To an unused memory region. The stack will remain in cache until RAM
|
||||
* is initialized
|
||||
*/
|
||||
#undef CFG_INIT_RAM_LOCK
|
||||
#undef CFG_INIT_RAM_LOCK
|
||||
/* #define CFG_INIT_RAM_ADDR 0x40000000*/ /* unused memory region */
|
||||
/* #define CFG_INIT_RAM_ADDR 0xfba00000*/ /* unused memory region */
|
||||
#define CFG_INIT_RAM_ADDR 0xf1080000 /* unused memory region */
|
||||
|
|
@ -261,7 +261,7 @@
|
|||
|
||||
#define RELOCATE_INTERNAL_RAM_ADDR
|
||||
#ifdef RELOCATE_INTERNAL_RAM_ADDR
|
||||
/*#define CFG_INTERNAL_RAM_ADDR 0xfba00000*/
|
||||
/*#define CFG_INTERNAL_RAM_ADDR 0xfba00000*/
|
||||
#define CFG_INTERNAL_RAM_ADDR 0xf1080000
|
||||
#endif
|
||||
|
||||
|
|
@ -270,16 +270,16 @@
|
|||
* (Set up by the startup code)
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
/* Dummies for BAT 4-7 */
|
||||
#define CFG_SDRAM1_BASE 0x10000000 /* each 256 MByte */
|
||||
#define CFG_SDRAM2_BASE 0x20000000
|
||||
#define CFG_SDRAM3_BASE 0x30000000
|
||||
#define CFG_SDRAM4_BASE 0x40000000
|
||||
#define CFG_SDRAM1_BASE 0x10000000 /* each 256 MByte */
|
||||
#define CFG_SDRAM2_BASE 0x20000000
|
||||
#define CFG_SDRAM3_BASE 0x30000000
|
||||
#define CFG_SDRAM4_BASE 0x40000000
|
||||
#define CFG_RESET_ADDRESS 0xfff00100
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MONITOR_BASE 0xfff00000
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 256 kB for malloc */
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 256 kB for malloc */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH related
|
||||
|
|
@ -289,15 +289,15 @@
|
|||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
|
||||
#define CFG_FLASH_BASE 0xfc000000 /* start of flash banks */
|
||||
#define CFG_FLASH_BASE 0xfc000000 /* start of flash banks */
|
||||
#define CFG_MAX_FLASH_BANKS 4 /* max number of memory banks */
|
||||
#define CFG_FLASH_INCREMENT 0x01000000 /* size of flash bank */
|
||||
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, \
|
||||
CFG_FLASH_BASE + 1*CFG_FLASH_INCREMENT, \
|
||||
CFG_FLASH_BASE + 2*CFG_FLASH_INCREMENT, \
|
||||
CFG_FLASH_BASE + 3*CFG_FLASH_INCREMENT }
|
||||
#define CFG_FLASH_EMPTY_INFO 1 /* show if bank is empty */
|
||||
#define CFG_FLASH_INCREMENT 0x01000000 /* size of flash bank */
|
||||
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, \
|
||||
CFG_FLASH_BASE + 1*CFG_FLASH_INCREMENT, \
|
||||
CFG_FLASH_BASE + 2*CFG_FLASH_INCREMENT, \
|
||||
CFG_FLASH_BASE + 3*CFG_FLASH_INCREMENT }
|
||||
#define CFG_FLASH_EMPTY_INFO 1 /* show if bank is empty */
|
||||
|
||||
/* areas to map different things with the GT in physical space */
|
||||
#define CFG_DRAM_BANKS 4
|
||||
|
|
@ -308,20 +308,20 @@
|
|||
/* Peripheral Device section */
|
||||
|
||||
/*******************************************************/
|
||||
/* We have on the cpci750 Board : */
|
||||
/* GT-Chipset Register Area */
|
||||
/* GT-Chipset internal SRAM 256k */
|
||||
/* SRAM on external device module */
|
||||
/* Real time clock on external device module */
|
||||
/* dobble UART on external device module */
|
||||
/* Data flash on external device module */
|
||||
/* Boot flash on external device module */
|
||||
/* We have on the cpci750 Board : */
|
||||
/* GT-Chipset Register Area */
|
||||
/* GT-Chipset internal SRAM 256k */
|
||||
/* SRAM on external device module */
|
||||
/* Real time clock on external device module */
|
||||
/* dobble UART on external device module */
|
||||
/* Data flash on external device module */
|
||||
/* Boot flash on external device module */
|
||||
/*******************************************************/
|
||||
#define CFG_DFL_GT_REGS 0x14000000 /* boot time GT_REGS */
|
||||
#define CFG_CPCI750_RESET_ADDR 0x14000000 /* After power on Reset the CPCI750 is here */
|
||||
#define CFG_CPCI750_RESET_ADDR 0x14000000 /* After power on Reset the CPCI750 is here */
|
||||
|
||||
#undef MARVEL_STANDARD_CFG
|
||||
#ifndef MARVEL_STANDARD_CFG
|
||||
#undef MARVEL_STANDARD_CFG
|
||||
#ifndef MARVEL_STANDARD_CFG
|
||||
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
|
||||
#define CFG_GT_REGS 0xf1000000 /* GT Registers will be mapped here */
|
||||
/*#define CFG_DEV_BASE 0xfc000000*/ /* GT Devices CS start here */
|
||||
|
|
@ -333,11 +333,11 @@
|
|||
#define CFG_DEV2_SPACE 0xfe000000 /* DEV_CS2 flash 3 */
|
||||
#define CFG_DEV3_SPACE 0xf0000000 /* DEV_CS3 nvram/can */
|
||||
|
||||
#define CFG_BOOT_SIZE _16M /* cpci750 flash 0 */
|
||||
#define CFG_DEV0_SIZE _16M /* cpci750 flash 1 */
|
||||
#define CFG_DEV1_SIZE _16M /* cpci750 flash 2 */
|
||||
#define CFG_DEV2_SIZE _16M /* cpci750 flash 3 */
|
||||
#define CFG_DEV3_SIZE _16M /* cpci750 nvram/can */
|
||||
#define CFG_BOOT_SIZE _16M /* cpci750 flash 0 */
|
||||
#define CFG_DEV0_SIZE _16M /* cpci750 flash 1 */
|
||||
#define CFG_DEV1_SIZE _16M /* cpci750 flash 2 */
|
||||
#define CFG_DEV2_SIZE _16M /* cpci750 flash 3 */
|
||||
#define CFG_DEV3_SIZE _16M /* cpci750 nvram/can */
|
||||
|
||||
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
|
||||
#endif
|
||||
|
|
@ -346,22 +346,22 @@
|
|||
#define CFG_DEV0_PAR 0x8FDFFFFF /* 16 bit flash */
|
||||
#define CFG_DEV1_PAR 0x8FDFFFFF /* 16 bit flash */
|
||||
#define CFG_DEV2_PAR 0x8FDFFFFF /* 16 bit flash */
|
||||
#define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */
|
||||
#define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */
|
||||
#define CFG_BOOT_PAR 0x8FDFFFFF /* 16 bit flash */
|
||||
|
||||
/* c 4 a 8 2 4 1 c */
|
||||
/* 33 22|2222|22 22|111 1|11 11|1 1 | | */
|
||||
/* c 4 a 8 2 4 1 c */
|
||||
/* 33 22|2222|22 22|111 1|11 11|1 1 | | */
|
||||
/* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */
|
||||
/* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */
|
||||
/* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */
|
||||
|
||||
|
||||
/* MPP Control MV64360 Appendix P P. 632*/
|
||||
#define CFG_MPP_CONTROL_0 0x00002222 /* */
|
||||
#define CFG_MPP_CONTROL_1 0x11110000 /* */
|
||||
#define CFG_MPP_CONTROL_2 0x11111111 /* */
|
||||
#define CFG_MPP_CONTROL_3 0x00001111 /* */
|
||||
/* #define CFG_SERIAL_PORT_MUX 0x00000102*/ /* */
|
||||
#define CFG_MPP_CONTROL_0 0x00002222 /* */
|
||||
#define CFG_MPP_CONTROL_1 0x11110000 /* */
|
||||
#define CFG_MPP_CONTROL_2 0x11111111 /* */
|
||||
#define CFG_MPP_CONTROL_3 0x00001111 /* */
|
||||
/* #define CFG_SERIAL_PORT_MUX 0x00000102*/ /* */
|
||||
|
||||
|
||||
#define CFG_GPP_LEVEL_CONTROL 0xffffffff /* 1111 1111 1111 1111 1111 1111 1111 1111*/
|
||||
|
|
@ -378,12 +378,12 @@
|
|||
ECC disable
|
||||
non registered DRAM */
|
||||
/* 31:26 25:22 21:20 19 18 17 16 */
|
||||
/* 100001 0000 010 0 0 0 0 */
|
||||
/* 100001 0000 010 0 0 0 0 */
|
||||
/* refresh_count=0x400
|
||||
phisical interleaving disable
|
||||
virtual interleaving enable */
|
||||
/* 15 14 13:0 */
|
||||
/* 0 1 0x400 */
|
||||
/* 0 1 0x400 */
|
||||
# define CFG_SDRAM_CONFIG 0x58200400 /* 0x1400 copied from Dink32 bzw. VxWorks*/
|
||||
|
||||
|
||||
|
|
@ -392,14 +392,14 @@
|
|||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
|
||||
#define PCI_HOST_FORCE 1 /* configure as pci host */
|
||||
#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
|
||||
#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
|
||||
#define PCI_HOST_FORCE 1 /* configure as pci host */
|
||||
#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
|
||||
|
||||
#define CONFIG_PCI /* include pci support */
|
||||
#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
|
||||
#define CONFIG_PCI_PNP /* do pci plug-and-play */
|
||||
#define CONFIG_PCI_SCAN_SHOW /* show devices on bus */
|
||||
#define CONFIG_PCI /* include pci support */
|
||||
#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
|
||||
#define CONFIG_PCI_PNP /* do pci plug-and-play */
|
||||
#define CONFIG_PCI_SCAN_SHOW /* show devices on bus */
|
||||
|
||||
/* PCI MEMORY MAP section */
|
||||
#define CFG_PCI0_MEM_BASE 0x80000000
|
||||
|
|
@ -433,21 +433,21 @@
|
|||
* IDE/ATA stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
|
||||
#undef CONFIG_IDE_LED /* no led for ide supported */
|
||||
#define CONFIG_IDE_RESET /* no reset for ide supported */
|
||||
#define CONFIG_IDE_PREINIT /* check for units */
|
||||
#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
|
||||
#undef CONFIG_IDE_LED /* no led for ide supported */
|
||||
#define CONFIG_IDE_RESET /* no reset for ide supported */
|
||||
#define CONFIG_IDE_PREINIT /* check for units */
|
||||
|
||||
#define CFG_IDE_MAXBUS 2 /* max. 1 IDE busses */
|
||||
#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 1 drives per IDE bus */
|
||||
#define CFG_IDE_MAXBUS 2 /* max. 1 IDE busses */
|
||||
#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 1 drives per IDE bus */
|
||||
|
||||
#define CFG_ATA_BASE_ADDR 0
|
||||
#define CFG_ATA_IDE0_OFFSET 0
|
||||
#define CFG_ATA_IDE1_OFFSET 0
|
||||
#define CFG_ATA_BASE_ADDR 0
|
||||
#define CFG_ATA_IDE0_OFFSET 0
|
||||
#define CFG_ATA_IDE1_OFFSET 0
|
||||
|
||||
#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
|
||||
#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */
|
||||
#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */
|
||||
#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
|
||||
#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */
|
||||
#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------
|
||||
|
|
@ -551,7 +551,7 @@
|
|||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
|
||||
#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
|
|
@ -563,23 +563,23 @@
|
|||
#define CFG_FLASH_LOCK_TOUT 500 /* Timeout for Flash Lock (in ms) */
|
||||
|
||||
#if 0
|
||||
#define CFG_ENV_IS_IN_FLASH 0
|
||||
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_IS_IN_FLASH 0
|
||||
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x10000
|
||||
#define CFG_ENV_ADDR 0xFFF78000 /* Marvell 8-Bit Bootflash last sector */
|
||||
/* #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) */
|
||||
/* #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) */
|
||||
#endif
|
||||
|
||||
#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 5
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
|
||||
#define CFG_I2C_EEPROM_ADDR 0x050
|
||||
#define CFG_I2C_EEPROM_ADDR 0x050
|
||||
#define CFG_ENV_OFFSET 0x200 /* environment starts at the beginning of the EEPROM */
|
||||
#define CFG_ENV_SIZE 0x600 /* 2048 bytes may be used for env vars*/
|
||||
|
||||
#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
|
||||
#define CFG_NVRAM_SIZE (32*1024) /* NVRAM size */
|
||||
#define CFG_VXWORKS_MAC_PTR (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-0x40)
|
||||
#define CFG_VXWORKS_MAC_PTR (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-0x40)
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
|
|
@ -601,7 +601,7 @@
|
|||
#if defined (CONFIG_750CX) || defined (CONFIG_750FX)
|
||||
#define L2_INIT 0
|
||||
#else
|
||||
#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
|
||||
#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
|
||||
L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
|
||||
#endif
|
||||
|
||||
|
|
@ -612,9 +612,9 @@
|
|||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
#define CFG_BOARD_ASM_INIT 1
|
||||
#define CFG_BOARD_ASM_INIT 1
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -300,8 +300,6 @@
|
|||
#define NAND_ChipID_UNKNOWN 0x00
|
||||
#define NAND_MAX_FLOORS 1
|
||||
|
||||
|
||||
|
||||
#ifdef NAND_NO_RB
|
||||
/* constant delay (see also tR in the datasheet) */
|
||||
#define NAND_WAIT_READY(nand) do { \
|
||||
|
|
|
|||
|
|
@ -229,9 +229,8 @@
|
|||
/*
|
||||
* GPIO configuration
|
||||
*/
|
||||
//###CHD: MSB = 1 -> 64MB: funktioniert nicht: ERRATA - BUG?
|
||||
//###CHD: 0x10000004 = 32MB SDRAM
|
||||
//###CHD: 0x90000004 = 64MB SDRAM
|
||||
/* 0x10000004 = 32MB SDRAM */
|
||||
/* 0x90000004 = 64MB SDRAM */
|
||||
#define CFG_GPS_PORT_CONFIG 0x10000004
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -65,7 +65,6 @@ extern void nand_release (struct mtd_info *mtd);
|
|||
extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
|
||||
|
||||
|
||||
|
||||
/* This constant declares the max. oobsize / page, which
|
||||
* is supported now. If you add a chip with bigger oobsize/page
|
||||
* adjust this accordingly.
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user