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rockchip: rk3288: use ARM arch timer instead of rk_timer

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We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2019-07-09 22:00:26 +08:00
parent 002d897fb1
commit ae5a3659f3
4 changed files with 58 additions and 8 deletions
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2
arch/arm/mach-rockchip/Makefile
View File

@ -42,7 +42,7 @@ endif
obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
ifndef CONFIG_ARM64
ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036),)
ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X)$(CONFIG_ROCKCHIP_RK3036)$(CONFIG_ROCKCHIP_RK3288),)
obj-y += rk_timer.o
endif
endif

32
arch/arm/mach-rockchip/rk3288-board-spl.c
View File

@ -22,7 +22,6 @@
#include <asm/arch-rockchip/sdram.h>
#include <asm/arch-rockchip/sdram_common.h>
#include <asm/arch-rockchip/sys_proto.h>
#include <asm/arch-rockchip/timer.h>
#include <dm/root.h>
#include <dm/test.h>
#include <dm/util.h>
@ -108,6 +107,31 @@ __weak int arch_cpu_init(void)
return 0;
}
#define TIMER_LOAD_COUNT_L 0x00
#define TIMER_LOAD_COUNT_H 0x04
#define TIMER_CONTROL_REG 0x10
#define TIMER_EN 0x1
#define TIMER_FMODE BIT(0)
#define TIMER_RMODE BIT(1)
void rockchip_stimer_init(void)
{
/* If Timer already enabled, don't re-init it */
u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
if (reg & TIMER_EN)
return;
asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY));
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
TIMER_CONTROL_REG);
}
void board_init_f(ulong dummy)
{
struct udevice *dev;
@ -131,7 +155,11 @@ void board_init_f(ulong dummy)
hang();
}
rockchip_timer_init();
/* Init secure timer */
rockchip_stimer_init();
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();
arch_cpu_init();
ret = rockchip_get_clk(&dev);

25
arch/arm/mach-rockchip/rk3288-board-tpl.c
View File

@ -12,7 +12,25 @@
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/timer.h>
#define TIMER_LOAD_COUNT_L 0x00
#define TIMER_LOAD_COUNT_H 0x04
#define TIMER_CONTROL_REG 0x10
#define TIMER_EN 0x1
#define TIMER_FMODE BIT(0)
#define TIMER_RMODE BIT(1)
void rockchip_stimer_init(void)
{
asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY));
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
TIMER_CONTROL_REG);
}
void board_init_f(ulong dummy)
{
@ -36,7 +54,10 @@ void board_init_f(ulong dummy)
hang();
}
rockchip_timer_init();
/* Init secure timer */
rockchip_stimer_init();
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();
ret = rockchip_get_clk(&dev);
if (ret) {

7
include/configs/rk3288_common.h
View File

@ -13,9 +13,10 @@
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_ARCH_TIMER
#define CONFIG_SYS_HZ_CLOCK 24000000
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */