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u-boot-brain
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Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net

This commit is contained in:
Tom Rini 2021-06-18 11:18:56 -04:00
parent a298d4fbcd 54c321f9de
commit 97c8cb524c
15 changed files with 1207 additions and 51 deletions
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12
arch/arm/dts/fsl-ls1028a-rdb.dts
View File

@ -15,12 +15,12 @@
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases {
spi0 = &fspi;
eth0 = &enetc0;
eth1 = &enetc2;
eth2 = &mscc_felix_port0;
eth3 = &mscc_felix_port1;
eth4 = &mscc_felix_port2;
eth5 = &mscc_felix_port3;
ethernet0 = &enetc0;
ethernet1 = &enetc2;
ethernet2 = &mscc_felix_port0;
ethernet3 = &mscc_felix_port1;
ethernet4 = &mscc_felix_port2;
ethernet5 = &mscc_felix_port3;
};
};

10
arch/sandbox/dts/test.dts
View File

@ -14,11 +14,11 @@
aliases {
console = &uart0;
eth0 = "/eth@10002000";
eth2 = &swp_0;
eth3 = &eth_3;
eth4 = &dsa_eth0;
eth5 = &eth_5;
ethernet0 = "/eth@10002000";
ethernet2 = &swp_0;
ethernet3 = &eth_3;
ethernet4 = &dsa_eth0;
ethernet5 = &eth_5;
gpio1 = &gpio_a;
gpio2 = &gpio_b;
gpio3 = &gpio_c;

8
cmd/pxe_utils.c
View File

@ -587,6 +587,14 @@ static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label)
f2 = "-";
f3 = env_get("board");
f4 = ".dtb";
if (!f1) {
f1 = "";
f2 = "";
}
if (!f3) {
f2 = "";
f3 = "";
}
}
len = strlen(label->fdtdir);

8
drivers/net/Kconfig
View File

@ -673,6 +673,14 @@ config SNI_AVE
This driver implements support for the Socionext AVE Ethernet
controller, as found on the Socionext UniPhier family.
config SNI_NETSEC
bool "Socionext NETSEC Ethernet support"
depends on DM_ETH && SYNQUACER_SPI
select PHYLIB
help
This driver implements support for the Socionext SynQuacer NETSEC
ethernet controller, as found on the Socionext SynQuacer family.
source "drivers/net/mscc_eswitch/Kconfig"
config ETHER_ON_FEC1

1
drivers/net/Makefile
View File

@ -89,6 +89,7 @@ obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
obj-$(CONFIG_FSL_PFE) += pfe_eth/
obj-y += qe/
obj-$(CONFIG_SNI_AVE) += sni_ave.o
obj-$(CONFIG_SNI_NETSEC) += sni_netsec.o
obj-y += ti/
obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o
obj-y += mscc_eswitch/

19
drivers/net/dwc_eth_qos.c
View File

@ -172,8 +172,6 @@ struct eqos_mtl_regs {
#define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK 0x3f
#define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC BIT(7)
#define EQOS_MTL_RXQ0_OPERATION_MODE_RSF BIT(5)
#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP BIT(4)
#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP BIT(3)
#define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT 16
#define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK 0x7fff
@ -321,6 +319,7 @@ struct eqos_priv {
void *rx_pkt;
bool started;
bool reg_access_ok;
bool clk_ck_enabled;
};
/*
@ -591,12 +590,13 @@ static int eqos_start_clks_stm32(struct udevice *dev)
goto err_disable_clk_rx;
}
if (clk_valid(&eqos->clk_ck)) {
if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) {
ret = clk_enable(&eqos->clk_ck);
if (ret < 0) {
pr_err("clk_enable(clk_ck) failed: %d", ret);
goto err_disable_clk_tx;
}
eqos->clk_ck_enabled = true;
}
#endif
@ -648,8 +648,6 @@ static void eqos_stop_clks_stm32(struct udevice *dev)
clk_disable(&eqos->clk_tx);
clk_disable(&eqos->clk_rx);
clk_disable(&eqos->clk_master_bus);
if (clk_valid(&eqos->clk_ck))
clk_disable(&eqos->clk_ck);
#endif
debug("%s: OK\n", __func__);
@ -1222,7 +1220,6 @@ static int eqos_start(struct udevice *dev)
}
/* Configure MTL */
writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100);
/* Enable Store and Forward mode for TX */
/* Program Tx operating mode */
@ -1236,9 +1233,7 @@ static int eqos_start(struct udevice *dev)
/* Enable Store and Forward mode for RX, since no jumbo frame */
setbits_le32(&eqos->mtl_regs->rxq0_operation_mode,
EQOS_MTL_RXQ0_OPERATION_MODE_RSF |
EQOS_MTL_RXQ0_OPERATION_MODE_FEP |
EQOS_MTL_RXQ0_OPERATION_MODE_FUP);
EQOS_MTL_RXQ0_OPERATION_MODE_RSF);
/* Transmit/Receive queue fifo size; use all RAM for 1 queue */
val = readl(&eqos->mac_regs->hw_feature1);
@ -1314,12 +1309,6 @@ static int eqos_start(struct udevice *dev)
eqos->config->config_mac <<
EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0,
EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK <<
EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT,
0x2 <<
EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
/* Multicast and Broadcast Queue Enable */
setbits_le32(&eqos->mac_regs->unused_0a4,
0x00100000);

4
drivers/net/e1000.c
View File

@ -5673,6 +5673,10 @@ static int e1000_write_hwaddr(struct eth_device *dev)
DEBUGOUT("%s: mac=%pM\n", __func__, mac);
if ((hw->eeprom.type == e1000_eeprom_invm) &&
!(E1000_READ_REG(hw, EECD) & E1000_EECD_FLASH_DETECTED_I210))
return -ENOSYS;
memset(current_mac, 0, 6);
/* Read from EEPROM, not from registers, to make sure

1
drivers/net/e1000.h
View File

@ -1245,6 +1245,7 @@ struct e1000_hw {
#define E1000_EECD_FLUPD 0x00080000 /* Update FLASH */
#define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */
#define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/
#define E1000_EECD_FLASH_DETECTED_I210 0x00080000 /* FLASH detected */
#define E1000_FLUDONE_ATTEMPTS 20000
#define E1000_EECD_AUPDEN 0x00100000 /* Enable Autonomous FLASH update */
#define E1000_EECD_SHADV 0x00200000 /* Shadow RAM Data Valid */

4
drivers/net/fm/eth.c
View File

@ -288,8 +288,10 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth)
/* alloc Rx buffer from main memory */
rx_buf_pool = malloc(MAX_RXBUF_LEN * RX_BD_RING_SIZE);
if (!rx_buf_pool)
if (!rx_buf_pool) {
free(rx_bd_ring_base);
return -ENOMEM;
}
memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE);
debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool);

24
drivers/net/octeontx/smi.c
View File

@ -314,10 +314,12 @@ read_error:
int octeontx_smi_probe(struct udevice *dev)
{
int ret, subnode, cnt = 0, node = dev_ofnode(dev).of_offset;
struct mii_dev *bus;
struct octeontx_smi_priv *priv;
pci_dev_t bdf = dm_pci_get_bdf(dev);
struct octeontx_smi_priv *priv;
struct mii_dev *bus;
int ret, cnt = 0;
ofnode subnode;
u64 baseaddr;
debug("SMI PCI device: %x\n", bdf);
if (!dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM)) {
@ -325,14 +327,12 @@ int octeontx_smi_probe(struct udevice *dev)
return -1;
}
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
"cavium,thunder-8890-mdio-nexus");
fdt_for_each_subnode(subnode, gd->fdt_blob, node) {
ret = fdt_node_check_compatible(gd->fdt_blob, subnode,
"cavium,thunder-8890-mdio");
if (ret)
dev_for_each_subnode(subnode, dev) {
if (!ofnode_device_is_compatible(subnode,
"cavium,thunder-8890-mdio"))
continue;
if (ofnode_read_u64(subnode, "reg", &baseaddr))
continue;
bus = mdio_alloc();
priv = malloc(sizeof(*priv));
if (!bus || !priv) {
@ -347,9 +347,7 @@ int octeontx_smi_probe(struct udevice *dev)
bus->priv = priv;
priv->mode = CLAUSE22;
priv->baseaddr = (void __iomem *)fdtdec_get_addr(gd->fdt_blob,
subnode,
"reg");
priv->baseaddr = (void __iomem *)baseaddr;
debug("mdio base addr %p\n", priv->baseaddr);
/* use given name or generate its own unique name */

1134
drivers/net/sni_netsec.c Normal file
View File

File diff suppressed because it is too large Load Diff

8
drivers/net/sun8i_emac.c
View File

@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
* The EMAC clock is either 200 or 300 MHz, so we need a divider
* of 128 to get the MDIO frequency below the required 2.5 MHz.
*/
mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
if (!priv->use_internal_phy)
mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
MDIO_CMD_MII_CLK_CSR_SHIFT;
mii_cmd |= MDIO_CMD_MII_BUSY;
@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
* The EMAC clock is either 200 or 300 MHz, so we need a divider
* of 128 to get the MDIO frequency below the required 2.5 MHz.
*/
mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
if (!priv->use_internal_phy)
mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
MDIO_CMD_MII_CLK_CSR_SHIFT;
mii_cmd |= MDIO_CMD_MII_WRITE;
mii_cmd |= MDIO_CMD_MII_BUSY;

21
net/eth-uclass.c
View File

@ -69,8 +69,11 @@ void eth_set_current_to_next(void)
/*
* Typically this will simply return the active device.
* In the case where the most recent active device was unset, this will attempt
* to return the first device. If that device doesn't exist or fails to probe,
* this function will return NULL.
* to return the device with sequence id 0 (which can be configured by the
* device tree). If this fails, fall back to just getting the first device.
* The latter is non-deterministic and depends on the order of the probing.
* If that device doesn't exist or fails to probe, this function will return
* NULL.
*/
struct udevice *eth_get_dev(void)
{
@ -80,9 +83,13 @@ struct udevice *eth_get_dev(void)
if (!uc_priv)
return NULL;
if (!uc_priv->current)
eth_errno = uclass_first_device(UCLASS_ETH,
&uc_priv->current);
if (!uc_priv->current) {
eth_errno = uclass_get_device_by_seq(UCLASS_ETH, 0,
&uc_priv->current);
if (eth_errno)
eth_errno = uclass_first_device(UCLASS_ETH,
&uc_priv->current);
}
return uc_priv->current;
}
@ -598,8 +605,8 @@ static int eth_pre_remove(struct udevice *dev)
return 0;
}
UCLASS_DRIVER(eth) = {
.name = "eth",
UCLASS_DRIVER(ethernet) = {
.name = "ethernet",
.id = UCLASS_ETH,
.post_bind = eth_post_bind,
.pre_unbind = eth_pre_unbind,

2
test/dm/ofnode.c
View File

@ -213,7 +213,7 @@ static int dm_test_ofnode_read_aliases(struct unit_test_state *uts)
ofnode node;
int size;
node = ofnode_get_aliases_node("eth3");
node = ofnode_get_aliases_node("ethernet3");
ut_assert(ofnode_valid(node));
ut_asserteq_str("sbe5", ofnode_get_name(node));

2
test/dm/test-fdt.c
View File

@ -183,7 +183,7 @@ static int dm_test_alias_highest_id(struct unit_test_state *uts)
{
int ret;
ret = dev_read_alias_highest_id("eth");
ret = dev_read_alias_highest_id("ethernet");
ut_asserteq(5, ret);
ret = dev_read_alias_highest_id("gpio");