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mips: octeon: Add octeon-model.h header
This header is used by the upcoming DDR driver and potentially by other drivers ported from the 2013 Cavium / Marvell U-Boot repository. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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arch/mips/mach-octeon/include/mach/octeon-model.h
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arch/mips/mach-octeon/include/mach/octeon-model.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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#ifndef __OCTEON_MODEL_H__
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#define __OCTEON_MODEL_H__
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/*
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* NOTE: These must match what is checked in common-config.mk
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* Defines to represent the different versions of Octeon.
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*
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* IMPORTANT: When the default pass is updated for an Octeon Model,
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* the corresponding change must also be made in the oct-sim script.
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*
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* The defines below should be used with the OCTEON_IS_MODEL() macro to
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* determine what model of chip the software is running on. Models ending
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* in 'XX' match multiple models (families), while specific models match only
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* that model. If a pass (revision) is specified, then only that revision
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* will be matched. Care should be taken when checking for both specific
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* models and families that the specific models are checked for first.
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* While these defines are similar to the processor ID, they are not intended
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* to be used by anything other that the OCTEON_IS_MODEL framework, and
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* the values are subject to change at anytime without notice.
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*
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* NOTE: only the OCTEON_IS_MODEL() macro/function and the OCTEON_CN* macros
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* should be used outside of this file. All other macros are for internal
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* use only, and may change without notice.
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*/
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#define OCTEON_FAMILY_MASK 0x00ffff00
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#define OCTEON_PRID_MASK 0x00ffffff
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/* Flag bits in top byte */
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/* Ignores revision in model checks */
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#define OM_IGNORE_REVISION 0x01000000
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/* Check submodels */
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#define OM_CHECK_SUBMODEL 0x02000000
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/* Match all models previous than the one specified */
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#define OM_MATCH_PREVIOUS_MODELS 0x04000000
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/* Ignores the minor revison on newer parts */
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#define OM_IGNORE_MINOR_REVISION 0x08000000
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#define OM_FLAG_MASK 0xff000000
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/* Match all cn5XXX Octeon models. */
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#define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000
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/* Match all cn6XXX Octeon models. */
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#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
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/* Match all cnf7XXX Octeon models. */
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#define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000
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/* Match all cn7XXX Octeon models. */
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#define OM_MATCH_7XXX_FAMILY_MODELS 0x10000000
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#define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS | \
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OM_MATCH_6XXX_FAMILY_MODELS | \
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OM_MATCH_F7XXX_FAMILY_MODELS | \
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OM_MATCH_7XXX_FAMILY_MODELS)
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/*
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* CN7XXX models with new revision encoding
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*/
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#define OCTEON_CNF75XX_PASS1_0 0x000d9800
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#define OCTEON_CNF75XX_PASS1_2 0x000d9802
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#define OCTEON_CNF75XX_PASS1_3 0x000d9803
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#define OCTEON_CNF75XX (OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CNF75XX_PASS1_X \
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(OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN73XX_PASS1_0 0x000d9700
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#define OCTEON_CN73XX_PASS1_1 0x000d9701
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#define OCTEON_CN73XX_PASS1_2 0x000d9702
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#define OCTEON_CN73XX_PASS1_3 0x000d9703
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#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN73XX_PASS1_X \
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(OCTEON_CN73XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN72XX OCTEON_CN73XX
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#define OCTEON_CN23XX OCTEON_CN73XX
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#define OCTEON_CN23XX_PASS1_2 OCTEON_CN73XX_PASS1_2
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#define OCTEON_CN23XX_PASS1_3 OCTEON_CN73XX_PASS1_3
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#define OCTEON_CN70XX_PASS1_0 0x000d9600
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#define OCTEON_CN70XX_PASS1_1 0x000d9601
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#define OCTEON_CN70XX_PASS1_2 0x000d9602
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#define OCTEON_CN70XX_PASS2_0 0x000d9608
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#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN70XX_PASS1_X \
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(OCTEON_CN70XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN70XX_PASS2_X \
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(OCTEON_CN70XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN71XX OCTEON_CN70XX
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#define OCTEON_CN78XX_PASS1_0 0x000d9500
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#define OCTEON_CN78XX_PASS1_1 0x000d9501
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#define OCTEON_CN78XX_PASS2_0 0x000d9508
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#define OCTEON_CN78XX (OCTEON_CN78XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN78XX_PASS1_X \
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(OCTEON_CN78XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN78XX_PASS2_X \
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(OCTEON_CN78XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL)
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/*
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* CNF7XXX models with new revision encoding
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*/
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#define OCTEON_CNF71XX_PASS1_0 0x000d9400
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#define OCTEON_CNF71XX_PASS1_1 0x000d9401
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#define OCTEON_CNF71XX (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CNF71XX_PASS1_X \
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(OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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/*
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* CN6XXX models with new revision encoding
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*/
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#define OCTEON_CN68XX_PASS1_0 0x000d9100
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#define OCTEON_CN68XX_PASS1_1 0x000d9101
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#define OCTEON_CN68XX_PASS2_0 0x000d9108
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#define OCTEON_CN68XX_PASS2_1 0x000d9109
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#define OCTEON_CN68XX_PASS2_2 0x000d910a
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#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN68XX_PASS1_X \
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(OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS2_X \
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(OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN68XX_PASS1 OCTEON_CN68XX_PASS1_X
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#define OCTEON_CN68XX_PASS2 OCTEON_CN68XX_PASS2_X
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#define OCTEON_CN66XX_PASS1_0 0x000d9200
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#define OCTEON_CN66XX_PASS1_2 0x000d9202
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#define OCTEON_CN66XX (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN66XX_PASS1_X \
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(OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS1_0 0x000d9000
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#define OCTEON_CN63XX_PASS1_1 0x000d9001
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#define OCTEON_CN63XX_PASS1_2 0x000d9002
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#define OCTEON_CN63XX_PASS2_0 0x000d9008
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#define OCTEON_CN63XX_PASS2_1 0x000d9009
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#define OCTEON_CN63XX_PASS2_2 0x000d900a
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#define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN63XX_PASS1_X \
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(OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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#define OCTEON_CN63XX_PASS2_X \
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(OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
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/* CN62XX is same as CN63XX with 1 MB cache */
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#define OCTEON_CN62XX OCTEON_CN63XX
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#define OCTEON_CN61XX_PASS1_0 0x000d9300
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#define OCTEON_CN61XX_PASS1_1 0x000d9301
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#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
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#define OCTEON_CN61XX_PASS1_X \
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(OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
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/* CN60XX is same as CN61XX with 512 KB cache */
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#define OCTEON_CN60XX OCTEON_CN61XX
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/* This matches the complete family of CN3xxx CPUs, and not subsequent models */
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#define OCTEON_CN6XXX \
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(OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
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#define OCTEON_CNF7XXX \
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(OCTEON_CNF71XX_PASS1_0 | OM_MATCH_F7XXX_FAMILY_MODELS)
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#define OCTEON_CN7XXX \
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(OCTEON_CN78XX_PASS1_0 | OM_MATCH_7XXX_FAMILY_MODELS)
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/*
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* The revision byte (low byte) has two different encodings.
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* CN3XXX:
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*
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* bits
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* <7:5>: reserved (0)
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* <4>: alternate package
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* <3:0>: revision
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*
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* CN5XXX and older models:
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*
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* bits
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* <7>: reserved (0)
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* <6>: alternate package
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* <5:3>: major revision
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* <2:0>: minor revision
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*/
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/* Masks used for the various types of model/family/revision matching */
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#define OCTEON_38XX_FAMILY_MASK 0x00ffff00
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#define OCTEON_38XX_FAMILY_REV_MASK 0x00ffff0f
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#define OCTEON_38XX_MODEL_MASK 0x00ffff10
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#define OCTEON_38XX_MODEL_REV_MASK \
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(OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)
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/* CN5XXX and later use different layout of bits in the revision ID field */
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#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
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#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
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#define OCTEON_58XX_MODEL_MASK 0x00ffff40
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#define OCTEON_58XX_MODEL_REV_MASK \
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(OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
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#define OCTEON_58XX_MODEL_MINOR_REV_MASK \
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(OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
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#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
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#define __OCTEON_MATCH_MASK__(X, Y, Z) \
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({ \
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typeof(X) x = (X); \
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typeof(Y) y = (Y); \
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typeof(Z) z = (Z); \
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(x & z) == (y & z); \
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})
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/*
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* __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
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* returns true if chip_model is identical or belong to the OCTEON
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* model group specified in arg_model.
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*/
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/* Helper macros to make to following macro compacter */
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#define OM_MASK OM_FLAG_MASK
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#define OM_MATCH_MASK __OCTEON_MATCH_MASK__
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#define OM_MATCH_PREVIOUS OM_MATCH_PREVIOUS_MODELS
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#define __OCTEON_IS_MODEL_COMPILE__(A, B) \
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({ \
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typeof(A) a = (A); \
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typeof(B) b = (B); \
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(((((((a) & OM_MASK) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) && \
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OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MASK)) || \
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((((a) & OM_MASK) == 0) && \
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OM_MATCH_MASK((b), (a), OCTEON_58XX_FAMILY_REV_MASK)) || \
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((((a) & OM_MASK) == OM_IGNORE_MINOR_REVISION) && \
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OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
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((((a) & OM_MASK) == OM_CHECK_SUBMODEL) && \
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OM_MATCH_MASK((b), (a), OCTEON_58XX_MODEL_MASK)) || \
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((((a) & OM_MASK) == OM_IGNORE_REVISION) && \
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OM_MATCH_MASK((b), (a), OCTEON_58XX_FAMILY_MASK)) || \
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((((a) & (OM_MATCH_5XXX_FAMILY_MODELS)) == \
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OM_MATCH_5XXX_FAMILY_MODELS) && \
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((b & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
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((((a) & (OM_MATCH_6XXX_FAMILY_MODELS)) == \
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OM_MATCH_6XXX_FAMILY_MODELS) && \
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((b & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) && \
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((b & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
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((((a) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == \
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OM_MATCH_F7XXX_FAMILY_MODELS) && \
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((b & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) && \
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((b & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
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((((a) & (OM_MATCH_7XXX_FAMILY_MODELS)) == \
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OM_MATCH_7XXX_FAMILY_MODELS) && ((b & OCTEON_PRID_MASK) >= \
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OCTEON_CN78XX_PASS1_0)) || \
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((((a) & (OM_MATCH_PREVIOUS)) == OM_MATCH_PREVIOUS) && \
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(((b) & OCTEON_58XX_MODEL_MASK) < ((a) & OCTEON_58XX_MODEL_MASK))) \
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))); \
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})
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#ifndef OCTEON_IS_MODEL
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static inline int __octeon_is_model_runtime_internal__(u32 model)
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{
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u32 cpuid = read_c0_prid();
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return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
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}
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static inline int __octeon_is_model_runtime__(u32 model)
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{
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return __octeon_is_model_runtime_internal__(model);
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}
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/*
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* The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
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* in a program.
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* This should be kept runtime if at all possible and must be conditionalized
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* with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
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*
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* Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
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* is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
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* I.e.:
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* #if OCTEON_IS_MODEL(OCTEON_CN56XX) -> #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
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*/
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#define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
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#define OCTEON_IS_COMMON_BINARY() 1
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#undef OCTEON_MODEL
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#endif
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#define OCTEON_IS_OCTEON2() \
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(OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
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#define OCTEON_IS_OCTEON3() OCTEON_IS_MODEL(OCTEON_CN7XXX)
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const char *octeon_model_get_string(u32 chip_id);
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const char *octeon_model_get_string_buffer(u32 chip_id, char *buffer);
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/**
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* Return the octeon family, i.e., ProcessorID of the PrID register.
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*
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* @return the octeon family on success, ((u32)-1) on error.
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*/
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static inline u32 cvmx_get_octeon_family(void)
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{
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return (read_c0_prid() & OCTEON_FAMILY_MASK);
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}
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#endif /* __OCTEON_MODEL_H__ */
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