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mips: octeon: dts: mrvl, cn73xx.dtsi: Add memory controller DT node

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This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2020-09-02 08:29:02 +02:00 committed by Daniel Schwierzeck
parent 5dcf7cc590
commit a23c279059
1 changed files with 17 additions and 0 deletions
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17
arch/mips/dts/mrvl,cn73xx.dtsi
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@ -72,6 +72,23 @@
<0x0300e 4>, <0x0300f 4>;
};
l2c: l2c@1180080000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-7xxx-l2c";
reg = <0x11800 0x80000000 0x0 0x01000000>;
u-boot,dm-pre-reloc;
};
lmc: lmc@1180088000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-7xxx-ddr4";
reg = <0x11800 0x88000000 0x0 0x02000000>; // 2 IFs
u-boot,dm-pre-reloc;
l2c-handle = <&l2c>;
};
reset: reset@1180006001600 {
compatible = "mrvl,cn7xxx-rst";
reg = <0x11800 0x06001600 0x0 0x200>;