brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

imx-common: Factor out get_ahb_clk()

Browse Source 
get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2012-04-29 08:11:13 +00:00 committed by Albert ARIBAUD
parent 28fdbddc94
commit 6a376046ef
6 changed files with 24 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/cpu/armv7/imx-common/cpu.c
View File

@ -29,6 +29,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/crm_regs.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
@ -127,3 +128,15 @@ void reset_cpu(ulong addr)
{
__raw_writew(4, WDOG1_BASE_ADDR);
}
u32 get_ahb_clk(void)
{
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
u32 reg, ahb_podf;
reg = __raw_readl(&imx_ccm->cbcdr);
reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET;
return get_periph_clk() / (ahb_podf + 1);
}

19
arch/arm/cpu/armv7/mx5/clock.c
View File

@ -30,6 +30,7 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <div64.h>
#include <asm/arch/sys_proto.h>
enum pll_clocks {
PLL1_CLOCK = 0,
@ -192,7 +193,7 @@ u32 get_mcu_main_clk(void)
/*
* Get the rate of peripheral's root clock.
*/
static u32 get_periph_clk(void)
u32 get_periph_clk(void)
{
u32 reg;
@ -212,22 +213,6 @@ static u32 get_periph_clk(void)
/* NOTREACHED */
}
/*
* Get the rate of ahb clock.
*/
static u32 get_ahb_clk(void)
{
uint32_t freq, div, reg;
freq = get_periph_clk();
reg = __raw_readl(&mxc_ccm->cbcdr);
div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
return freq / div;
}
/*
* Get the rate of ipg clock.
*/

19
arch/arm/cpu/armv7/mx6/clock.c
View File

@ -24,8 +24,9 @@
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/ccm_regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
enum pll_clocks {
PLL_SYS, /* System PLL */
@ -34,7 +35,7 @@ enum pll_clocks {
PLL_ENET, /* ENET PLL */
};
struct imx_ccm_reg *imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR;
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
void enable_usboh3_clk(unsigned char enable)
{
@ -92,7 +93,7 @@ static u32 get_mcu_main_clk(void)
return freq / (reg + 1);
}
static u32 get_periph_clk(void)
u32 get_periph_clk(void)
{
u32 reg, freq = 0;
@ -139,18 +140,6 @@ static u32 get_periph_clk(void)
return freq;
}
static u32 get_ahb_clk(void)
{
u32 reg, ahb_podf;
reg = __raw_readl(&imx_ccm->cbcdr);
reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET;
return get_periph_clk() / (ahb_podf + 1);
}
static u32 get_ipg_clk(void)
{
u32 reg, ipg_podf;

2
arch/arm/include/asm/arch-mx5/sys_proto.h
View File

@ -35,5 +35,7 @@ void set_chipselect_size(int const);
*/
int fecmxc_initialize(bd_t *bis);
u32 get_ahb_clk(void);
u32 get_periph_clk(void);
#endif

2
arch/arm/include/asm/arch-mx6/ccm_regs.h → arch/arm/include/asm/arch-mx6/crm_regs.h
View File

@ -20,7 +20,7 @@
#ifndef __ARCH_ARM_MACH_MX6_CCM_REGS_H__
#define __ARCH_ARM_MACH_MX6_CCM_REGS_H__
struct imx_ccm_reg {
struct mxc_ccm_reg {
u32 ccr; /* 0x0000 */
u32 ccdr;
u32 csr;

3
arch/arm/include/asm/arch-mx6/sys_proto.h
View File

@ -34,5 +34,6 @@ u32 get_cpu_rev(void);
*/
int fecmxc_initialize(bd_t *bis);
u32 get_ahb_clk(void);
u32 get_periph_clk(void);
#endif