diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c index 3d58d8ae91..b96fa5bdb9 100644 --- a/arch/arm/cpu/armv7/imx-common/cpu.c +++ b/arch/arm/cpu/armv7/imx-common/cpu.c @@ -29,6 +29,7 @@ #include #include #include +#include #ifdef CONFIG_FSL_ESDHC #include @@ -127,3 +128,15 @@ void reset_cpu(ulong addr) { __raw_writew(4, WDOG1_BASE_ADDR); } + +u32 get_ahb_clk(void) +{ + struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + u32 reg, ahb_podf; + + reg = __raw_readl(&imx_ccm->cbcdr); + reg &= MXC_CCM_CBCDR_AHB_PODF_MASK; + ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET; + + return get_periph_clk() / (ahb_podf + 1); +} diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index d769a4d772..903e207762 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -30,6 +30,7 @@ #include #include #include +#include enum pll_clocks { PLL1_CLOCK = 0, @@ -192,7 +193,7 @@ u32 get_mcu_main_clk(void) /* * Get the rate of peripheral's root clock. */ -static u32 get_periph_clk(void) +u32 get_periph_clk(void) { u32 reg; @@ -212,22 +213,6 @@ static u32 get_periph_clk(void) /* NOTREACHED */ } -/* - * Get the rate of ahb clock. - */ -static u32 get_ahb_clk(void) -{ - uint32_t freq, div, reg; - - freq = get_periph_clk(); - - reg = __raw_readl(&mxc_ccm->cbcdr); - div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >> - MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1; - - return freq / div; -} - /* * Get the rate of ipg clock. */ diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index ef98563ff7..0f05432941 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -24,8 +24,9 @@ #include #include #include -#include +#include #include +#include enum pll_clocks { PLL_SYS, /* System PLL */ @@ -34,7 +35,7 @@ enum pll_clocks { PLL_ENET, /* ENET PLL */ }; -struct imx_ccm_reg *imx_ccm = (struct imx_ccm_reg *)CCM_BASE_ADDR; +struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; void enable_usboh3_clk(unsigned char enable) { @@ -92,7 +93,7 @@ static u32 get_mcu_main_clk(void) return freq / (reg + 1); } -static u32 get_periph_clk(void) +u32 get_periph_clk(void) { u32 reg, freq = 0; @@ -139,18 +140,6 @@ static u32 get_periph_clk(void) return freq; } - -static u32 get_ahb_clk(void) -{ - u32 reg, ahb_podf; - - reg = __raw_readl(&imx_ccm->cbcdr); - reg &= MXC_CCM_CBCDR_AHB_PODF_MASK; - ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET; - - return get_periph_clk() / (ahb_podf + 1); -} - static u32 get_ipg_clk(void) { u32 reg, ipg_podf; diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 13d12ee1a4..3f10d2914c 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -35,5 +35,7 @@ void set_chipselect_size(int const); */ int fecmxc_initialize(bd_t *bis); +u32 get_ahb_clk(void); +u32 get_periph_clk(void); #endif diff --git a/arch/arm/include/asm/arch-mx6/ccm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h similarity index 99% rename from arch/arm/include/asm/arch-mx6/ccm_regs.h rename to arch/arm/include/asm/arch-mx6/crm_regs.h index 4af0b90164..0e605c26f5 100644 --- a/arch/arm/include/asm/arch-mx6/ccm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -20,7 +20,7 @@ #ifndef __ARCH_ARM_MACH_MX6_CCM_REGS_H__ #define __ARCH_ARM_MACH_MX6_CCM_REGS_H__ -struct imx_ccm_reg { +struct mxc_ccm_reg { u32 ccr; /* 0x0000 */ u32 ccdr; u32 csr; diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 668e77af6a..69687a855e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -34,5 +34,6 @@ u32 get_cpu_rev(void); */ int fecmxc_initialize(bd_t *bis); - +u32 get_ahb_clk(void); +u32 get_periph_clk(void); #endif