brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

mips: refactor disabling of caches

Browse Source 
Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Daniel Schwierzeck 2020-07-12 00:45:56 +02:00
parent b55e07e565
commit 60772433dd
2 changed files with 10 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/mips/cpu/start.S
View File

@ -196,11 +196,10 @@ wr_done:
mtc0 zero, CP0_COMPARE
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
mfc0 t0, CP0_CONFIG
and t0, t0, MIPS_CONF_IMPL
or t0, t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG
ehb
/* Disable caches */
PTR_LA t9, mips_cache_disable
jalr t9
nop
#endif
#ifdef CONFIG_MIPS_CM

6
arch/mips/lib/cache_init.S
View File

@ -418,6 +418,12 @@ return:
jr R_RETURN
END(mips_cache_reset)
LEAF(mips_cache_disable)
move R_RETURN, ra
change_k0_cca_kseg1 CONF_CM_UNCACHED
jr R_RETURN
END(mips_cache_disable)
LEAF(change_k0_cca)
mfc0 t0, CP0_CONFIG
#if __mips_isa_rev >= 2