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pwsh1: specify DRAM regs in per-board impl

This commit is contained in:
Takumi Sueda 2020-10-26 03:41:45 +09:00 committed by Suguru Saito
parent 87abacbd9c
commit 5e1bc7ea1d
1 changed files with 56 additions and 0 deletions
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56
board/sharp/pwsh1/iomux.c
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@ -219,8 +219,64 @@ const iomux_cfg_t iomux_setup[] = {
#define HW_DRAM_CTL29_CONFIG \
(CS_MAP << 24 | COLUMN_SIZE << 16 | ADDR_PINS << 8 | APREBIT)
const static uint32_t lpddr_dram_vals[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 000 - 003
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 004 - 007
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 008 - 011
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 012 - 015
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 016 - 019
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 020 - 023
0x00000000, 0x00000000, 0x00010101, 0x01010101, // 024 - 027
0x000f0f01, 0x0f02010a, 0x00000000, 0x00000101, // 028 - 031
0x00000100, 0x00000100, 0x01000000, 0x00000002, // 032 - 035
0x01010000, 0x06040201, 0x06000001, 0x0a000000, // 036 - 039
0x02009c40, 0x0002030b, 0x0036b008, 0x030e0550, // 040 - 043
0x02030002, 0x00170017, 0x00000000, 0x00000000, // 044 - 047
0x00013200, 0xffff0303, 0x00013200, 0xffff0303, // 048 - 051
0x00013200, 0xffff0303, 0x00013200, 0xffff0303, // 052 - 055
0x00000003, 0x00000000, 0x00000000, 0x00000000, // 056 - 059
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 060 - 063
0x00000000, 0x00000000, 0x00000305, 0x01000f02, // 064 - 067
0x00000000, 0x00000200, 0x00020007, 0xf3004a27, // 068 - 071
0xf3004a27, 0x00000000, 0x00000000, 0x07000310, // 072 - 075
0x07000310, 0x00000000, 0x00000000, 0x00800004, // 076 - 079
0x00000000, 0x00000000, 0x01000000, 0x01020408, // 080 - 083
0x08040201, 0x000f1133, 0x00000000, 0x00001f08, // 084 - 087
0x00001f08, 0x00000000, 0x00000000, 0x00001f01, // 088 - 091
0x00001f01, 0x00000000, 0x00000000, 0x00000000, // 092 - 095
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 096 - 099
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 100 - 103
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 104 - 107
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 108 - 111
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 112 - 115
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 116 - 119
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 120 - 123
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 124 - 127
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 128 - 131
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 132 - 135
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 136 - 139
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 140 - 143
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 144 - 147
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 148 - 151
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 152 - 155
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 156 - 159
0x00000000, 0x00000000, 0x00000000, 0x00010301, // 160 - 163
0x00000002, 0x00000000, 0x00000000, 0x00000000, // 164 - 167
0x00000000, 0x00000000, 0x00000000, 0x01010000, // 168 - 171
0x01000100, 0x03030000, 0x00020303, 0x01010202, // 172 - 175
0x00000000, 0x01030101, 0x21002101, 0x00030500, // 176 - 179
0x03050305, 0x00320032, 0x00320032, 0x00000000, // 180 - 183
0x00000000, 0x00000000, 0x00000000, 0x00000000, // 184 - 187
0x00000000, 0xffffffff // 188 - 189
};
void mxs_adjust_memory_params(uint32_t *dram_vals)
{
int i;
for (i = 0; i < ARRAY_SIZE(lpddr_dram_vals); i++) {
dram_vals[i] = lpddr_dram_vals[i];
}
}
void board_init_ll(const uint32_t arg, const uint32_t *resptr)